This paper defines real-time image processing and takes a top-down approach to processor design. Discussion of architectures and system design issues involves the definition and discussion of system trades. A breakdown of image processing algorithms high-lights the basic computational and data addressing structures. Examination of implementation constraints guides the resolving of design trade issues.

The principles and applications of microwave holography are reviewed to establish the need for a high resolution microwave camera. The realization of such a camera requires solving several problems stemming from: (a) the economical constraints associated with the construction of microwave imaging apertures with large numerical apertures needed for high resolution and (b) the desirability of real-time processing and image retrieval. Recent advances made in the solution of these problems are discussed with attention given to a new method of swept frequency synthesis of an imaging aperture and real-time optical computing of the collected data. (Scanned holography microwave imaging, optical computing, aperture synthesis by frequency diversity, super-resolution).

A number of real-time linear predictive coders ( LPCs) have been developed to compress speech waveforms to 2400 bits per second (bps). Most of these LPCs employ a central processing unit (CPU) to analyze a stream of speech samples on a frame-by-frame (block-form) basis. While physical size, weight and power dissipation of these units have been decreasing steadily, the operation of a battery-powered hand-carried unit is far from realization. This paper presents the flow-form implementation of an LPC as an alternative to the block-form CPU intensive approach. The flow-form implementation of an LPC allows for decentralized, semi-autonomous, arithmetic-intensive segments which are supplemented by a microprocessor. The microprocessor performs relatively non-taxing logic operations and computations. F low-form analysis computation is highly systematic and repetitive making this form of analysis well-suited for Very Large Scale Integration (VLSI). Because flow-form analysis does not require a large array of stored data, less data memory is required and power dissipation is reduced. With current technology an LPC can be implemented using fewer than ten chips and having a total power dissipation of less than three watts. The flow-form LPC is comparable in performance to the block-form LPC, and the two units are interoperable, provided the same coding rules and data transmission formats are used.

An advanced implementation of a full duplex, multiple transmission rate, high performance channel vocoder is described which draws upon charge coupled device (CCD), switched capacitor, and digital microprocessor NMOS LSI technologies. The heart of the transmitter is a 19 channel spectrum analyzer chip realized via FIR non-recursive filter design methods. Pitch and voicing are determined with a modified Gold type of algorithm requiring very few components to implement. The receiver consists mainly of a 19 channel synthesis filter bank, including exciter, realized via switched capacitor recursive filtering techniques. Transmit and receive control functions are implemented in an 8 bit microprocessor and rates of 1.2, 2.4, 3.6, 4.8 kbs are supported. The design requires 30 integrated circuits, dissipates 5 W, weighs 6.25 lbs, and occupies .12 cu. ft.

Digital processing requirements for musical sounds are determined both by characteristics of the sounds themselves and by the desired type of control over the synchrony and succession of these sounds. Musical sounds may run the gamut of aural perception, requiring information rates as high as several million bits per second. Signal processing methods must therefore by evaluated from the standpoint of computational speed, as well as the intuitive meaningfulness of control parameters for each method. Those methods peculiar to computer music include additive, subtractive, and non-linear synthesis techniques, as well as procedures for simulating room reverberation. Several versions of real time digital hardware for music processing have been built, each following different design approaches and each with differing real time capabilities.

The primary function of NASA space missions is to deliver remotely-sensed measurements of a domain of interest to a scientific or applications user community on Earth. As the ability of the user to independently process and analyze these measurements increases so does his appetite for rapid delivery of the data in order that timely interaction with his remote instrument may occur. This paper describes a proposed set of standard telemetry protocols which facilitate the end-to-end transport of instrument data, from the spacecraft to the user, in real time and at potentially high cost-efficiency.

The basic concept of the new data reduction and compaction approach presented in this paper is to process on-board the satellites, the sensor raw data output essentially on a comparison/correlation basis, with stored targets' signatures. In this manner only pertinent target information, extracted from the vast raw sensor data, will be downlinked, therby substantially reducing total bits transmitted.

A range/intensity mapping algorithm suitable for displaying active infrared radar images in real-time using pseudocolor is discussed. The availability of range as well as intensity in an active system requires the development of a multidimensional signal processing technique. The high resolution of an optical imaging system combined with conventional radar techniques provide a unique real-time image unattainable using microwave radar. By mapping range information into hues and intensity information. into different apparent brightness levels of each hue, a three-dimensional quality can be imparted to infrared imagery. Examples of its implementation, using data generated by an infrared radar testbed system, are given. Finally, a potential hardware implementation of this technique is described.

A programmable time-delay-and-sum digital beamformer is described. This digital Dynamic Beamformer allows slow changes in element positions and/or beam steering direction to be updated while the beamformer carries out a real-time transformation of 32 input channels into 1500 beams.

Because of the potential for more rapid data collection, newer scanners for reconstructive tomography are implemented in a "fan-beam" geometry. In these implementations there is a source that emits a fan-shaped pattern of radiation. A detector located on the opposite side of the scanned object provides data that depend on the attenuation density of the object integrated along a ray in the fan joining the source and detector. Increased speed is realized by the use of not just a single detector but, rather, a circular array of detectors that collect data simultaneously along several rays in the fan. Original procedures for constructing tomographic sections from fan-beam data rely on the use of existing algorithms for parallel-beam data, which can be used by rearranging the fan-beam data into a parallel-beam format. (1,2) However, in this format the data suffer from a nonuniformity in sampling due to the nonlinear relationship between the fan-beam and parallel-beam coordinate systems. Partly for this reason, as well as for the conservation of data storage and potential speed benefits, algorithms that make direct use of fan-beam data have been derived by a number of investigators. (3,4,5) Published fan-beam algorithms assume that the output of all detectors in the fan are sampled simultaneously at discrete source angles as the source rotates about the object. The samples so derived at each source angle are processed together in a filtering operation which is followed by an "inverse square-law" back projection to yield the tomographic section after all source angles have been completed. We have investigated the implications of processing each detector output independently as the source rotates and then combining these processed detector outputs at the completion of all data collection to form the section. For a geometry in which the detector array rotates with the source, we have found that this can be accomplished without the back projection operation by using the emerging technology of adaptive transversal filters.

Performing the Discrete Fourier Transform via convolution using a transversal filter is attractive since it potentially provides a high speed, low power, low cost implementation. Previous papers have discussed two such algorithms and their associated device architectures: the Chirp-Z transform and the Prime transform. The Chirp-Z transform (CZT) performs the DFT as the succession of a point-by-point multiplication, a convolution, and a second point-by-point multiplication. The Prime transform is similar except that the point-by-point multiplications are replaced by permutations. To date, the accuracy of CZT implementations has been limited by multiplier errors, and the accuracy of Prime Transform implementations has been limited by permuter errors. Errors in the point-by-point postmultiplication or permutation are particularly troublesome, since no subsequent convolution is performed to average out the effect of such errors. The Dual Chirp-Z transform (Dual CZT) algorithm performs a discrete Fourier transform via successive convolution, point-by-point multiplication, and a second convolution. When the transform block size is even, the required reference functions for the convolutions and point-by-point multiplications become discrete chirps. Because the final operation is a convolution, the Dual CZT appears potentially attractive for the more accurate implementation of the discrete Fourier transform via transversal filters. If the block length is even, then the same transversal filters which would be used for the ordinary CZT may be used for the Dual CZT. Only the final summing device in the second complex filter needs to be modified to provide an equivalent change of the tap weights by a factor of (1 + i).

This paper describes the evaluation of a set of computer architectures for radar data signal processing. Architectures considered are C.mmp, Cm*, STARAN, CHOPP, DCS and the AN/UYK-7. A hypothetical radar application is chosen for analysis. Conclusions as to desirable architecture features are presented.

As the title of this article implies, I felt that it was first necessary to make a distinction between the commonly accepted forms of distributed processing architecture and the architecture that I wished to present. In many business applications one finds distributed processors in the form of intelligent terminals or remote job entry stations that are themselves General Purpose computers which share a common resource and data base by connection to a central processing element (see Figure 1). In this "satellite" type of approach, each of the processors has a generalized architecture and is equally good or bad at any particular task. One can characterize this by saying that "for the price each represents equal processing performance" or, for example, while it may take one hour to run a particular job at a satellite for 100 times the cost per hour one could use the central system -- but answers would be available in 1/100 of an hour.

The authors have developed a new electro-optical signal processing module, just a few cubic inches in size, capable of performing a broad variety of general linear filtering operations at very rapid rates, typically greater than 109 multiplications per second. The distinct feature of this processor is its use of incoherent optics to achieve speed and parallelism in its operation. References 1-6 describe previous work in this technology. The present paper reviews the characteristics of this processing technique, describes the mathematical operations it is capable of performing, gives the operating parameters of the current implementation, and presents plans for modifications to even further improve its performance.

A non-coherent vector-matrix multiplication system (using a linear LED input array, a covariance matrix mask and a linear photodiode detector array) is described. The system has been modified to perform complex multiplications and by feedback to be an iterative optical processor (I0P) to solve the adaptive phased array radar processing problem.

The design of wideband Acousto-Optic receivers with real-time signal processing capabilities is severely limited by the sequential readout characteristics of available monolithic photodiode arrays. An alternative receiver design, using a photo sensing concept that employs a linear fiber optic array is considered here. Each fiber in the array is connected to its own photosensor, video detector and threshold circuitry. The array cir-cuitry is interfaced with a digital processor capable of real-time analysis of the array output. The receiver, consisting of an acousto-optic spectrum analyzer, the fiber array and processor can measure signal frequency and time-of-arrival over wide band widths. This paper describes the characteristics of the fiber array and the system processor.

Recent advances in strobed Bragg cell raster recording techniques, along with the use of real time spatial light modulators, has lead to the construction of a real time, wideband, 2-D optical spectrum analyzer. The system configuration, key system components, theoretical and measured system performance, and future extensions are covered in detail.

With the maturing of acousto-optic technology, acousto-optic cells can provide a welcome replacement for two-dimensional processors. One such process of considerable interest is the ambiguity function. This paper presents several optical architectures which use one-dimensional acousto-optic transducers to implement the cross-ambiguity and auto-ambiguity functions. Most are two-dimensional extensions of the basic 1-d correlator. The paper begins with a brief description of the 1-d correlator, its extension to two dimensions, and its use as a spectrum analyzer. It then goes on to motivate and describe several ambiguity processor architectures. Finally, test results are presented, demonstrating successful processing of test signals.

Two recently reported optical processing concepts can be exploited for realtime linear shift-invariant processing of 2-D imagery with acoustooptic devices: (1) space coordinate-to-temporal frequency conversion, and (2) time-integration spectral analysis. A pair of crossed acoustooptic cells, driven by periodic chirp wave-forms, can be used for both operations. State-of-the-art acoustooptic devices appear suitable for gigahertz rate processing of images with spacebandwidth products approaching 106.

Acoustooptic devices provide the function of electrical to optical input transducers in many real-time optical processors of electronic signals. Particular implementations and applications emphasize modulation in space or time connected by a traveling-wave relation. Principal two-dimensional processor.s are spectrum analyzers and correlators. Multiport AO cells are useful in three-dimensional optical processing of two variables, such as frequency and phase. The performance of AO devices is limited by ef5iciency-bandwidth aperture tradeoffs which limit time bandwidths to approximately 10 for most practical devices. High efficiency devices (100%/W) have been developed for bandwidths up to approximately 600 MHz. At wider bandwidths, material attenuation and acoustooptic characteristics sharply limit efficiency, although near ideal piezoelectric transducers can be fabricated.

Implementation of the acoustooptic time-integrating correlators using integrated optics techniques is suggested. A hybrid version of such integrated acoustooptic correlators can be conveniently implemented in a LiNb03 substrate. Based on the findings of preliminary experiments such an integrated optic processor is expected to provide superior performance figures as well as a number of desirable features.

Applications of fiber and integrated optics to wideband radar signal processing are discussed. The systems requirements dictated by radar parameters (e.g., time-bandwidth product, dynamic range, etc.) are indicated and it is shown that optical techniques can provide a means for meeting these requirements. Examples of applications which are discussed include: (1) fiber-optic delay lines for pulse-to-pulse integration of wideband, high-resolution radar returns; (2) implementation of a noncoherent, high-resolution moving target indicator (MTI); (3) fiber-optic tapped delay lines for use as matched filters for detection, identification, and pattern recognition; and (4) a high-speed electro-optic analog-to-digital (A/D) converter. The devices required for realization of the above are described. These devices include laser diodes, avalanche photodiodes, and optical waveguides and switches. The properties of optical fibers relative to their application to the signal processing functions above are also discussed.

Charge-coupled devices have proved to be useful for a number of signal processing functions. This paper reviews types of CCD's which are useful for signal processing and discusses come electro-optical applications of the devices.

The superior electronic properties of GaAs, as compared with silicon, make possible the achievement of much higher performance levels in GaAs signal processing devices than have been demonstrated with silicon. Only recently, however, have advanced in GaAs materials and processing technology made possible the fabrication of such devices as sub-100 ps propagation delay, high density planar GaAs integrated circuits with LSI compatible power levels', and high transfer efficiency GaAs charge coupled devices' which should be capable of multi-gigahertz clocking rate operation. These high performance device technologies should have major impact on the high speed signal processing area, making possible, through their much higher speeds and lower power requirements, system approaches which could not be practically realized with existing silicon technology.

"These are interesting times in which we live" is an addage we have all heard oft repeated, but it has never been more true than in the technology explosion presently permeating the semiconductor industry. Rapid advances in processing, photolithography, and computeraided design (CAD) techniques are making possible semiconductor devices with performance characteristics heretofore considered impossible. This paper reviews some of the outstanding performance characteristics achieved with silicon-gate complementary-MOS (CMOS) fabricated on a sapphire substrate (CMOS/SOS). Three CMOS/SOS LSI devices, recently developed at the Electronics Research Center, are reviewed to demonstrate the strengths of the Rockwell technology. A 12-bit analog/digital (A/D) converter device(1) highlights the analog capabilities of the 4-micron technology. High-speed digital characteristics of the 3-micron technology are demonstrated by a CMOS/SOS frequency synthesizer.( 293) Tight packaging densities (1 square mil per transistor), high speed (800 picoseconds), low-power (0.2 picojoules) characteristics provided by the 2- micron technology are demonstrated by the Viterbi LSI device.( 4) CAD capability( S) greatly facilitating LSI design, analysis, layout and layout verification is also discussed briefly. Finally, the plans for both production and continued development of the CMOS/SOS technology are presented.

Real time digital signal processing requires large amounts of number crunching to be performed at high speed. The purpose of this report is to provide the state-of-the-art of high speed arithmetic integrated circuits (ICs). In order to understand the difficulties encountered in fabricating high speed arithmetic ICs, we start the article with a discussion on semiconductor technology. Next, we survey the various arithmetic elements that are available in monolithic form: ALUs, Data Slices, Multipliers, Floating Point Processors, and ROMs. Finally, we conclude with a comment on digital signal processing as a driving force for arithmetic ICs. NOTE: The report assumes knowledge of the basic arithmetic algorithms. Those desiring more background information can refer to [WAS 79a].

To be competitive in todays data entry marketplace an OCR machine may be capable of reading data at rates up to 6000 characters/second. This may require the signal processing to be performed at rates approaching 107 pixels/second - implying an equivalent number of arithmetic operations of an order of magnitude above this rate. These rates preclude the use of conventional array processing units and create special problems for equipment manufacturers. This paper describes the techniques of real time image enhancement, array and lens compensation, automatic shading correction and two dimensional digital filtering and thresholding incorporated in a high speed OCR reader.

CCD/NMOS analog sampled data signal processing technology is becoming sufficiently mature to warrant consideration for many signal processing functions. Similarly the desire for improved radar system performance has led to the development of many sophisticated radar signal processing techniques. The design and implementation of two types of CCD based radar processors are discussed in this paper. A moving target indicator capable of processing 1800 range bins of video with a 4 pole Butterworth filter characteristic has been developed for use with an AN/APS-94 radar. A.250 range bin chirp Z transform processor utilizing a CCD/NMOS integrated circuit has also been developed for the AN/PPS-5 radar.

Real time synthetic aperture radar (SAAR) processing is described in the context of real world constraints. The requirements for a SAR Processor to recognize tactical targets are outlined with other necessary modes. Interface with the rest of the radar is generally described. Cost vs. architecture tradeoffs are discussed. The cost impact of LSI in relationship to the breakdown of cost at the Unit, module, and IC level is also developed. For the example chosen a multifunctional programmable architecture utilizing LSI which minimizes the total module count is least expensive.

Recent emphasis placed upon real-time coherent radar signal processing has fostered competition between digital, CCD and SAW technologists. In that this stimulates and encourages technological advances, this competition is a healthy one; to the extent that the complementary rather than competitive properties of the technologies are not effectively utilized, the competition is counter-productive. The application of the various technologies to ground radar signal processors is investigated. The emergent theme emphasizes the fact that all signal processor tasks must be considered to properly assess the applicability of the various technologies. It is insufficient to compare signal processor implementations on the basis of a filtering function alone. To illustrate this viewpoint, examples of digital, CCD and SAW signal processors are given.

A standard high-speed, field-portable spectroradiometric measurement system built around a programmable microprocessor has been adapted to the form of a Reflectometer/Comparator. In this configuration, the instrument makes passive measurements of the absolute reflectance of agricultural plant canopies over a spectral range of 0.4 to 2.5 micrometers. Realtime absolute measurements are made possible by a unique optical chopper which constantly compares the target with the sun and derives the ratio, which is the reflectance. Extensive measurements of solar reflectance from a variety of these targets have been made. The paper describes the instrumentation and measurement procedures, reviews the software programming and discusses the results.