We study the effect of a well-known random process variation, line edge roughness (LER), present in the lithography and etch process, on the performance of a fundamental component, the Y-branch, through virtual fabrication simulations. Ideally, the Y-branch transmits the input power equally to its two output ports. However, imbalanced transmission between the two output ports is observed when LER is imposed on the Y-branch, depending on the statistical nature (amplitude and correlation length) of the LER. The imbalance can be as low as 1% for small LER amplitudes, and reach up to 15% for large LER amplitudes. In addition, LER increases the excess loss compared to the nominal (smooth) case. Ensemble statistical virtual fabrication and FDTD photonic simulations across a range of LER amplitude and correlation lengths are reported. These results can be captured as worst-case corner models and included in variation-aware photonic compact models. |
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CITATIONS
Cited by 2 scholarly publications.
Line edge roughness
Silicon photonics
Photonic integrated circuits
Manufacturing
Silicon
Waveguides
Light wave propagation