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Ion implanted planar MISFET's on semi-insulating indium phosphide substrate were studied. In-situ treatment with ammonia and UV activated CVD of silicon dioxide provided for threshold voltage drift below 0.5 V on depletion-mode transistors. Inverters from enhancement/depletion transistor pairs and 19-stage ring oscillators were made.
P. Dimitriou,A. Falcou,P. Krauz,G. Post, andA. Scavennec
"Technology And Drift Characteristics Of UVCVD-SiO2/InP MISFET Devices", Proc. SPIE 1144, 1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices, (28 November 1989); https://doi.org/10.1117/12.962014
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P. Dimitriou, A. Falcou, P. Krauz, G. Post, A. Scavennec, "Technology And Drift Characteristics Of UVCVD-SiO2 / InP MISFET Devices," Proc. SPIE 1144, 1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices, (28 November 1989); https://doi.org/10.1117/12.962014