Paper
12 March 2021 A two-step ADC architecture for dual band IRFPA
Author Affiliations +
Proceedings Volume 11763, Seventh Symposium on Novel Photoelectronic Detection Technology and Applications; 117635E (2021) https://doi.org/10.1117/12.2587236
Event: Seventh Symposium on Novel Photoelectronic Detection Technology and Application 2020, 2020, Kunming, China
Abstract
This paper presents a two-step ADC architecture for dual band infra-red focal plane array (IRFPA). It has advantages of small pixel area and low power over conventional pixel level ADC while maintaining the characteristic of enhancing well capacity of ROIC. The proposed two-step ADC with 16 bits is designed for middle / long wave (MW/LW) dual band IRFPA: 10-bit pulse frequency modulation (PFM) based pixel level ADC with 6-bit column paralleled Successive Approximation Register (SAR) ADC is employed for LW detector and 6-bit PFM based pixel level ADC with 10-bit column paralleled SAR ADC is employed for MW detector. Layout area of the pixel is 30 μm × 30 μm. The simulation result shows the DNL of the proposed two-step ADC for LW detector and MW detector are 0.6 LSB and 0.9 LSB respectively.
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Shengyou Zhong, Zhengfen Li, Wenbiao Mao, Jiqing Zhang, Nan Chen, and Libin Yao "A two-step ADC architecture for dual band IRFPA", Proc. SPIE 11763, Seventh Symposium on Novel Photoelectronic Detection Technology and Applications, 117635E (12 March 2021); https://doi.org/10.1117/12.2587236
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