Design and implementation of a fast interrupt system based on RISC-V

Zhenghui Zhang; Xiao Zhang; Jiandong Shang; Rongcai Zhao; Farui Yan

doi:10.1117/12.2685512

15 August 2023 Design and implementation of a fast interrupt system based on RISC-V

Zhenghui Zhang, Xiao Zhang, Jiandong Shang, Rongcai Zhao, Farui Yan

Proceedings Volume 12719, Second International Conference on Electronic Information Technology (EIT 2023); 1271917 (2023) https://doi.org/10.1117/12.2685512
Event: Second International Conference on Electronic Information Technology (EIT 2023), 2023, Wuhan, China

Abstract

Interrupt technology is a key technology for processors to respond to external events and plays an important role in the embedded field. The open source RISC-V architecture defines a complete set of interrupt mechanisms with hardware definitions that do not support interrupt nesting in embedded systems that only support machine mode, and software support for interrupt nesting adds additional time overhead. This paper is based on the interrupt mechanism defined by RISC-V, using a state machine to control the global interrupt enablement of the processor to support interrupt nesting, and to save the site and restore the site through hardware stacking and out-stacking to avoid the time consumption caused by the software level; a dedicated entry point for interrupt service program jumps further speeds up the response. In this paper, we design and implement a fast interrupt system using Hummingbird E203, an open source kernel defined by standard RISC-V, as an experimental platform. Simulation verification and comprehensive implementation on FPGA platform show that compared to the interrupt handling process of Hummingbird E203, using a small amount of hardware resource consumption, the response speed is improved by 1/4, providing better real-time performance and flexibility in embedded applications.

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Zhenghui Zhang, Xiao Zhang, Jiandong Shang, Rongcai Zhao, and Farui Yan "Design and implementation of a fast interrupt system based on RISC-V", Proc. SPIE 12719, Second International Conference on Electronic Information Technology (EIT 2023), 1271917 (15 August 2023); https://doi.org/10.1117/12.2685512

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KEYWORDS

Design and modelling

Clocks

Power consumption

Signal processing

Computer architecture

Computer simulations

Open source software

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