Poster + Paper
9 April 2024 Resist develop optimize to improve CDU and reduce process defect
Author Affiliations +
Conference Poster
Abstract
The pattern size of semiconductor circuits has been shrunk as technical advances continued. It is critical to the photomask which contained a considerably shrunk circuit and ultra-high density pattern for sub–20nm tech devices. Develop process has a great impact on the quality of the photomask manufacturing such as CD uniformity and defect control. In this paper, we discussion two develop optimization cases to improve CDU and to reduce process defects.
(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.
Yuan Hsu and Fumitaka Kameyama "Resist develop optimize to improve CDU and reduce process defect", Proc. SPIE 12957, Advances in Patterning Materials and Processes XLI, 129571L (9 April 2024); https://doi.org/10.1117/12.3009778
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KEYWORDS
Nozzles

Photoresist processing

Lithography

SRAF

Etching

Chromium

Image processing

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