Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition of resist by jetting technology onto the substrate. The patterned mask is lowered into the resist and the resist flows rapidly into the relief patterns in the mask by capillary action. The resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, since NIL applies the resist only to the necessary areas, no material is wasted. The reduced cost led by the absence of complicated optics in the imprint system, simple single level processing and zero waste, results in an attractive cost model for semiconductor memory applications. Establishing a new lithographic production solution requires the support of an ecosystem in order to enable seamless insertion of the technology. Various elements of the NIL infrastructure have been presented in the past to prepare the technology to be applied to a variety of different markets. In this paper, we review the current performance of Canon’s NIL technology and then discuss how NIL is being applied for a variety of semiconductor back-end levels, including both damascene and cut layers. A NIL-based DSA method is also discussed. Finally, we present the initial results on a meta optical element designed for the visible spectrum and show first images obtained with a metalens.
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