Architectures for single-chip image computing

Robert John Gove

doi:10.1117/12.58394

30 April 1992 Architectures for single-chip image computing

Robert John Gove

Proceedings Volume 1659, Image Processing and Interchange: Implementation and Systems; (1992) https://doi.org/10.1117/12.58394
Event: SPIE/IS&T 1992 Symposium on Electronic Imaging: Science and Technology, 1992, San Jose, CA, United States

Abstract

This paper will focus on the architectures of VLSI programmable processing components for image computing applications. TI, the maker of industry-leading RISC, DSP, and graphics components, has developed an architecture for a new-generation of image processors capable of implementing a plurality of image, graphics, video, and audio computing functions. We will show that the use of a single-chip heterogeneous MIMD parallel architecture best suits this class of processors--those which will dominate the desktop multimedia, document imaging, computer graphics, and visualization systems of this decade.

Citation Download Citation

Robert John Gove "Architectures for single-chip image computing", Proc. SPIE 1659, Image Processing and Interchange: Implementation and Systems, (30 April 1992); https://doi.org/10.1117/12.58394

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