Paper
26 May 1995 Effects of wafer topography on the formation of polysilicon gates
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Abstract
The effects of the active area topography on the critical dimension of a polysilicon gate are examined using the rigorous electromagnetic simulation program TEMPEST and SEM pictures of developed photoresist lines. The recessed nature of the active area contributes uneven exposure and hence a nonuniform critical dimension of the polysilicon gate as it reaches the end of the active area and as it traverses over the field oxide. This gate resist formation process over the active area was simulated and patterned in experiments of 0.35 micrometers features using an i-line system with an NA of 0.5 and a sigma of 0.6. The dominate effect of linewidth narrowing near the end of the active region is shown by simulation to track the three dimensional geometrical reflections of light illuminating the bowl shaped region near the end of the active area where the polysilicon covers the field oxide transition. The addition of a TiN anti-reflective coating (ARC) layer and the addition of dye to the photoresist were investigated by studying the energy deposited into the photoresist using TEMPEST as well as SEM pictures of photoresist lines. In both experiment and TEMPEST simulation, a TiN (ARC) layer was found to alleviate the problem while dyed photoresist showed little improvement.
© (1995) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Robert John Socha, Alfred K. K. Wong, Myron R. Cagan, Zoran Krivokapic, and Andrew R. Neureuther "Effects of wafer topography on the formation of polysilicon gates", Proc. SPIE 2440, Optical/Laser Microlithography VIII, (26 May 1995); https://doi.org/10.1117/12.209268
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Cited by 3 scholarly publications and 2 patents.
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KEYWORDS
Tin

Picture Archiving and Communication System

Reflectivity

Photoresist materials

Oxides

Semiconducting wafers

Ray tracing

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