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22 October 1996 Low-power radix 2 division algorithm with minimum add/sub operations
Emad N. Farag, M. Anwarul Hasan, Mohamed I. Elmasry
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Proceedings Volume 2846, Advanced Signal Processing Algorithms, Architectures, and Implementations VI; (1996) https://doi.org/10.1117/12.255450
Event: SPIE's 1996 International Symposium on Optical Science, Engineering, and Instrumentation, 1996, Denver, CO, United States
Abstract
Reducing power consumption has become an important issue in many design problems. However, in some cases this should be done without affecting the speed of operation. In this paper we present a division algorithm which minimizes the number of add/sub operations. By splitting a single iteration of the algorithm into two steps we are able to reduce the clock period and make the execution time independent of quotient digits. The redundancy of the signed-digit quotient representation is exploited to reduce the comparison precision and use a CSA. This reduces the hardware complexity (hence lower power consumption) and reduces the propagation delay (hence faster operation). Finally, a comparison is given between the proposed and existing algorithms. The proposed algorithm reduces the power consumption by 15% over radix 4 division algorithm and by 45% over the radix 2 division algorithm.
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Emad N. Farag, M. Anwarul Hasan, and Mohamed I. Elmasry "Low-power radix 2 division algorithm with minimum add/sub operations", Proc. SPIE 2846, Advanced Signal Processing Algorithms, Architectures, and Implementations VI, (22 October 1996); https://doi.org/10.1117/12.255450
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KEYWORDS
Clocks
Computer simulations
Computer arithmetic
Computer engineering
Optical transfer functions
Switches
Very large scale integration
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