Technique of analog integrated circuit yield analysis

Algirdas Baskys; Vitold Gobis

doi:10.1117/12.346931

27 April 1999 Technique of analog integrated circuit yield analysis

Algirdas Baskys, Vitold Gobis

Proceedings Volume 3743, In-Line Characterization, Yield Reliability, and Failure Analyses in Microelectronic Manufacturing; (1999) https://doi.org/10.1117/12.346931
Event: Microelectronic Manufacturing Technologies, 1999, Edinburgh, United Kingdom

Abstract

The technique of analog integrated circuits statistical analysis is suggested. This technique enables to determine the interrelation between integrated circuit yield on the one hand and the dimensions of elements on the other hand. The idea is based on the common use of experimental statistical analysis and statistical modeling and on the introduction of the concept of the integrated circuit intermediate parameters. The results of statistical analysis of two analog integrated circuits has been cited as an example of suggested technique. They show that there exist optimal dimensions of integrated circuits elements by yield maximum criteria and the values of optimal dimensions of elements depend on process technology level and the requirements for integrated circuits output parameters.

Citation Download Citation

Algirdas Baskys and Vitold Gobis "Technique of analog integrated circuit yield analysis", Proc. SPIE 3743, In-Line Characterization, Yield Reliability, and Failure Analyses in Microelectronic Manufacturing, (27 April 1999); https://doi.org/10.1117/12.346931

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