Wafer FAB experience of implementing 50-kV vector e-beam mask writer and dry etch process for 130-nm technology node generation

Won D. Kim; Robert D. Bennett; Z. Mark Ma

doi:10.1117/12.458310

11 March 2002 Wafer FAB experience of implementing 50-kV vector e-beam mask writer and dry etch process for 130-nm technology node generation

Won D. Kim, Robert D. Bennett, Z. Mark Ma

Author Affiliations +

Proceedings Volume 4562, 21st Annual BACUS Symposium on Photomask Technology; (2002) https://doi.org/10.1117/12.458310
Event: Photomask 2001, 2001, Monterey, CA, United States

Abstract

As the chip making industry gearing up for mass production of 130nm device technology node, Critical Dimension (CD) control becomes ever more important. Among many sources of possible contributions, there is increasing trend that the contributions are being identified for mask making processes itself. For example, at 180nm node, mask contribution to CD control has been 40~45 percent while at 250nm node the contribution was < 20 percent. At 130nm node, it is expected that mask contribution to CD non-uniformity could reach > 60 percent if existing mask making processes are continue to be employed. 60~70 percent of CD non-uniformity contribution from mask is clearly not acceptable. Therefore, we have engaged with our mask suppliers to bring in 50-kV e-beam vector mask pattern generator and dry etch process quickly for critical levels of 130nm device technology node production ramp. In this paper, we will share wafer FAB experiences of quickly implementing the 50-kV vector e-beam pattern generator and dry etch process for 130nm device node ramp. We will be discussing benefits realized from this transition in terms of; mask and wafer pattern fidelity improvements, mask CD linearity Improvements, e-beam writer process resist tone effects, finally and most importantly, impact on the wafer level CD control; Across the Chip Linewidth Variation (ACLV) reductions.

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Won D. Kim, Robert D. Bennett, and Z. Mark Ma "Wafer FAB experience of implementing 50-kV vector e-beam mask writer and dry etch process for 130-nm technology node generation", Proc. SPIE 4562, 21st Annual BACUS Symposium on Photomask Technology, (11 March 2002); https://doi.org/10.1117/12.458310

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KEYWORDS

Photomasks

Semiconducting wafers

Critical dimension metrology

Etching

Dry etching

Photoresist processing

Scanning electron microscopy

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