Paper
15 November 2002 Optical two-step modified signed-digit addition based on binary logic gates
R. S. Fyath, Ala A. W. Alsaffar, Mohammad S. Alam
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Abstract
A new modified signed-digit (MSD) addition algorithm based on binary logic gates is proposed for parallel computing. It is shown that by encoding each of the input MSD digits and flag digits into a pair of binary bits, the number of addition steps can be reduced to two. The flag digit is introduced to characterize the next low order pair (NLOP) of the input digits in order to suppress carry propagation. The rules for two-step addition of binary coded MSD (BCMSD) numbers are formulated that can be implemented using optical shadow-casting logic system.
© (2002) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
R. S. Fyath, Ala A. W. Alsaffar, and Mohammad S. Alam "Optical two-step modified signed-digit addition based on binary logic gates", Proc. SPIE 4788, Photonic Devices and Algorithms for Computing IV, (15 November 2002); https://doi.org/10.1117/12.451663
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KEYWORDS
Binary data

Logic

Logic devices

Computer programming

Composites

Prisms

Light emitting diodes

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