Paper
29 April 2008 Parasitic bipolar effect in modern SOI CMOS technologies
V. E. Shunkov, M. S. Gorbunov, G. I. Zebrev, B. V. Vasilegin
Author Affiliations +
Proceedings Volume 7025, Micro- and Nanoelectronics 2007; 702516 (2008) https://doi.org/10.1117/12.802479
Event: Micro- and Nanoelectronics 2007, 2007, Zvenigorod, Russian Federation
Abstract
Parasitic bipolar effect can significantly decrease SEE tolerance of modern deep submicron bulk and SOI CMOS devices due to amplification of charge collected in interaction between silicon and single ionizing particles. This article is dedicated to studies of bipolar effect phenomenon in modern SOI CMOS technologies and to increasing SEE tolerance without technology modifications.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
V. E. Shunkov, M. S. Gorbunov, G. I. Zebrev, and B. V. Vasilegin "Parasitic bipolar effect in modern SOI CMOS technologies", Proc. SPIE 7025, Micro- and Nanoelectronics 2007, 702516 (29 April 2008); https://doi.org/10.1117/12.802479
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KEYWORDS
Transistors

CMOS technology

Field effect transistors

Particles

Resistance

3D modeling

Silicon

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