Evaluation of MOBILE-based gate-level pipelining augmenting CMOS with RTDs

Juan Nuñez; María J. Avedillo; José M. Quintana

doi:10.1117/12.886816

3 May 2011 Evaluation of MOBILE-based gate-level pipelining augmenting CMOS with RTDs

Juan Nuñez, María J. Avedillo, José M. Quintana

Proceedings Volume 8067, VLSI Circuits and Systems V; 80670Z (2011) https://doi.org/10.1117/12.886816
Event: SPIE Microtechnologies, 2011, Prague, Czech Republic

Abstract

The incorporation of Resonant Tunnel Diodes (RTDs) into III/V transistor technologies has shown an improved circuit performance: higher circuit speed, reduced component count, and/or lowered power consumption. Currently, the incorporation of these devices into CMOS technologies (RTD-CMOS) is an area of active research. Although some works have focused the evaluation of the advantages of this incorporation, additional work in this direction is required. We compare RTD-CMOS and pure CMOS realizations of a network of logic gates which can be operated in a gate-level pipeline. Significant lower average power is obtained for RTD-CMOS implementations.

Citation Download Citation

Juan Nuñez, María J. Avedillo, and José M. Quintana "Evaluation of MOBILE-based gate-level pipelining augmenting CMOS with RTDs", Proc. SPIE 8067, VLSI Circuits and Systems V, 80670Z (3 May 2011); https://doi.org/10.1117/12.886816

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