In this work we compare electronic transport performance in HFETs based on single channel (SC) GaN/Al0.30GaN/AlN/GaN (2nm/20nm/1nm/3.5μm) and coupled channel (CC) GaN/Al0.285GaN/AlN/GaN/AlN/GaN (2nm/20nm/1nm/4nm/1nm/3.5μm) structures. The two structures have similar current gain cut-off frequencies (11.6 GHz for SC and 14 GHz for CC for ~ 1μm gate length) however, the maximum drain current, IDmax, is nearly doubled in the CC HFET (0.64 A/mm compared to 0.36 A/mm in SC). HFETs exhibit maximum transconductance (Gmmax) at a bias point close to where maximum fT occurs: VGS =-2.25 V and VDS =12 V and VGS = -2 V and VDS= 15 V for SC and CC HFETs, respectively. Since threshold voltage (Vth) is ~ -3.75 V for both SC and CC structures, devices are able to work at high frequencies with a high gm delivering higher ID. This is in contrast with device performance reported by others where fT is attained at VGS closer to Vth and therefore with lower ID/IDmax ratios and low Gm. Results are consistent in that CC HFET delivers higher IDmax because of the higher electron mobility (μ) and higher carrier density (n) in the channel. As the saturation drain current, IDsat, is attained at electric fields (~40KV/cm) lower than the critical electric field, Ecr , (~ 150KV/cm for GaN ) the higher fT in CC HFETs can be attributed, mainly, to a higher μ, which is in agreement with the Hall measurements. A higher μ in CC HFET is attributed to a shorter hot phonon lifetime.
In an effort to investigate the particulars of their stability, In18.5%Al81.5%N/GaN HFETs were subjected to on-state electrical stress for intervals totaling up to 20 hours. The current gain cutoff frequency fT showed a constant increase after each incremental stress, which was consistent with the decreased gate lag and the decreased phase noise. Extraction of small-signal circuit parameters demonstrated that the increase of fT is due to a decrease in the gate-source capacitance (Cgs) and gate-drain capacitance (Cgd) as well as the increased microwave transconductance (gm). All these behaviors are consistent with the diminishing of the gate extension (“virtual gate”) around the gate area.
Degradation of InAlN/GaN based HFETs under stress for four bias conditions, namely, on-state high field
stress (hot phonon, hot electron and self heating effect), off-state high field stress (hot electron effect), onstate
low field stress (self heating effect), and reverse gate bias stress (inverse piezoelectric effect) has been
examined. The degradation is characterized by monitoring electrical properties, such as, drain current
reduction, gate lag, and low frequency noise. On-state high field stress has shown more than 50% reduction
in the drain current and approximately 25-30 dBc/Hz increase in low frequency noise after 25 hours of
stress, while other stress conditions led to much lesser degradation. It is demonstrated that the major
degradation mechanism in InAlN/GaN HFETs is the hot-phonon and hot-electron effect in the realm of
short term effects.
Low-frequency noise and current-transient measurements were applied to analyze the degradation of nearly latticematched
InAlN/AlN/GaN heterostructure field-effect transistors caused by electrical stress. Almost identical devices
on the same wafer were stresses 7 hr. at a fixed DC drain bias of VDS=20 V and different gate biases. We noted up to
32 dB/Hz higher low-frequency noise for stressed devices over the entire frequency range of 1 Hz- 100 kHz. The
measurements showed the minimum degradation at a gate-controlled two-dimensional electron gas density of
9.4x1012 cm-2. This result is in good agreement with the reported stress effect on drain-current degradation and
current-gain-cutoff-frequency measurements, and consistent with the ultrafast decay of hot-phonons due to the
phonon-plasmon coupling. Moreover, the current transient (gate-lag) measurements were also performed on pristine
and highly degraded devices up to 5 ms pulse durations. Drain current is almost totally lost in degraded HFETs as
opposed to a very small drop for pristine devices and no recovery observed for both indicating that generation of
deep traps in GaN buffer.
We report on the electrical stress results in GaN-based heterostructure field-effect transistors (HFETs) with InAlN
barriers. We monitored the DC characteristics and low-frequency phase noise behavior for the devices at pre- and poststress
conditions for five different wafers with In compositions varying from 12% to 20% in the barriers of the
structures. The devices were stressed under off-state conditions with a gate bias of -10V (pinch-off condition) and zero
drain bias for 10hr. From the acquired data we observed that at higher In composition, HFETs became less sensitive to
the stress. At lower In composition we noted up to 30 dBc/Hz higher low frequency noise for stressed devices over the
entire frequency range of 1 Hz-100 kHz. The change in drain current and change in noise power due to electrical stress
decrease as the In composition in the barriers of the HFETs increases. The most relevant stress effect is revealed by a
drain current reduction which is consistent with higher noise level measured. It was found that the HFET degradation is
minimum for nearly lattice matched condition InAlN barriers, i.e.; 17% In composition, at which the sheet electron
density (channel current) is comparable with that in lower In composition (12% In). This latter result is promising for
power applications in which reliability of devices functioning at higher drain current is crucial. The results may also be
beneficial to decouple the effect of off-state stress from the hot electron and self heating effects.
Generation-recombination processes in AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect
transistors (MOSHFETs) with HfAlO gate dielectric have been investigated through low-frequency phase-noise.
Some devices tested exhibited noise spectra deviating from the well-known 1/γ spectrum. These devices showed
broad peaks attributed to generation-recombination (GR) effect in the noise-spectral-density (NSD) vs. frequency
plots, which shifted toward higher frequencies at elevated temperatures. The unannealed and annealed MOSHFETs
exhibited trap energy values as 0.22 eV and 0.11 eV at drain bias values of 6.3 V and 10 V, respectively. Then, we
monitored the effect of source-drain bias on the excess GR noise. The time constant of the traps decreased from 16.7
ms to 2.1 ms as we increased the drain bias,VDS, from 10 V to 18 V for the annealed devices. We also measured the
evolution of the GR-like spectrum as a function of VDS in HFETs to investigate the field-assisted emission. The
zero-field trap energy is extracted as 0.71 eV from temperature dependence of emission using extrapolation
technique to validate the potential barrier lowering (Frenkel-Poole effect) of the traps.
We report on the low-frequency noise (LFN) measurements on GaN based heterostructure field-effect transistors
(HFETs) on sapphire with InAlN and AlGaN barriers to investigate the effects of electrical stress. The HFETs with
InAlN barrier undergone a DC stress at bias conditions of VDS=20V and VG= -4.5 for up to 4 hours in aggregate.
These devices exhibited an LFN in the form of 1/fγ and a significant increase in the noise spectrum up to 15 dB for
2 hours and then the noise saturated for further stress durations. We also monitored the LFN for the HFETs with
AlGaN barriers. The devices were stressed by applying 20V DC drain bias for up to 64 hours at various gate
voltages. Stressing at a gate bias (VG) of -2V showed negligible degradation. On the other hand, stressing at VG=0V
surprisingly reduced the noise power by about 4 to 15 dB in the frequency range of 1 Hz-100 kHz. Additionally, the
InAlN-barrier HFETs exhibited 20-25 dB lower noise power than the ones with the AlGaN layer for the tested
devices within the entire frequency range. The results suggest that the trap generation increases due to electrical
stress in devices with InAlN barrier, whereas the noise power decreases as a function of stress in AlGaN/GaN
HFETs due to an increase in the activation energy of the excess traps.
A new stability criterion for heterojunction field effect transistors (HFETs) is introduced and
discussed in terms of our own stress-induced degradation experiments on the GaN varieties. The
new criterion explains how to choose the sheet conductance of the 2 DEG electron plasma in the
channel and the temperature dependence of the spontaneous polarization in the gate insulation for
maximal stability against stress-induced degradation. According to this criterion, for maximal
stability against thermal breakdown, the sheet conductance is chosen to be in a well defined vicinity
of the resonance of the optical phonons with the plasma frequency of the electrons in the channel.
The first steps toward studying this concept experimentally have been taken by monitoring the 1/f
noise of the HFETs both at baseband and through phase noise, i.e., with exponential modulation, and
comparing to the extent possible at this point with the results of the quantum 1/f noise calculation.
Our measurements of 1/f noise on pristine devices and on stressed devices, degraded by sustained
high drain bias, show that even a small 8% decrease in the maximal drain current produces some 5-
10 dB increase in the 1/f noise power. The latter is thus a much more sensitive indicator of damage.
The quantum electrodynamic (QED)- and quantum lattice-dynamic (QLD) quantum 1/f noise
formulas have been refined for the case of AlGaN/GaN HFETs through a better definition of the
coherence parameters s and s'.
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