Mr. Chih-Jie Lee Profile

Chih-Jie Lee

at Synopsys Taiwan Co Ltd

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Publications (6)

Proceedings Article | 10 April 2024 Presentation + Paper

High accuracy OPC electromagnetic full-chip modeling for curvilinear mask OPC and ILT

Enas Sakr, Zac Levinson, Rob DeLancey, C. Jay Lee, Jinguang Li, Ryan Chen, Robert Iwanow, Delian Yang, Wolfgang Hoppe, Folarin Latinwo, Kevin Lucas, Peng Liu

Proceedings Volume 12954, 129540N (2024) https://doi.org/10.1117/12.3013089

KEYWORDS: Optical proximity correction, Electromagnetism, Semiconducting wafers, Extreme ultraviolet, Cadmium, 3D mask effects, Modeling, Lithography, Computational lithography, Ranging

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Proceedings Article | 28 April 2023 Presentation + Paper

Automatic generation of representative and diversified pattern samples from a full chip layout

Jun Zhu, Brad Falch, Kyle Braam, Petrisor Panaite, Ming Su, C. Jay Lee

Proceedings Volume 12495, 124951B (2023) https://doi.org/10.1117/12.2662024

KEYWORDS: Education and training, Design and modelling, Statistical modeling, Machine learning, Reflection, Principal component analysis, Feature extraction, Transform theory, Statistical analysis, Data modeling

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Proceedings Article | 28 April 2023 Presentation + Paper

Evaluation of field stitching optimization for robust manufacturing with high-NA EUVL

Zachary Levinson, Thuc Dam, Paul Pfaeffli, C. Jay Lee, Wolfgang Hoppe, Ulrich Klostermann, Kevin Lucas

Proceedings Volume 12495, 124950B (2023) https://doi.org/10.1117/12.2659721

KEYWORDS: Reticles, Etching, Tolerancing, Extreme ultraviolet lithography, Simulations, Mirrors, Scanners, Manufacturing, Semiconducting wafers, Metals

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Proceedings Article | 28 April 2023 Presentation + Paper

Process optimization for next generation high-NA EUV patterning by computational lithography techniques

Zachary Levinson, Thuc Dam, Pervaiz Kareem, C. Jay Lee, Wolfgang Demmerle, Ulrich Klostermann

Proceedings Volume 12494, 124940W (2023) https://doi.org/10.1117/12.2658580

KEYWORDS: Extreme ultraviolet, SRAF, Semiconducting wafers, Extreme ultraviolet lithography, Optical lithography, Scanners, Reflection, Lithography, Computational lithography, Process control

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The lithography industry has historically striven to improve resolution by reducing wavelength and increasing the lens’ numerical aperture (NA). The introduction of 0.33 NA extreme ultraviolet (EUV) lithography into high-volume manufacturing (HVM) represents the largest jump in resolution ever achieved by the industry. However, even this resolution is not sufficient for the patterns required for beyond the 2 nm logic technology node. This is due to low contrast and the diffraction limit of current EUVL scanners for the mask patterns required for these nodes. Instead, the resolution must be improved by increasing the NA. This will also increase the contrast of patterns which had insufficient contrast at 0.33 NA, which will in turn improve LCDU and defectivity. This change is not without its challenges though. Increasing the NA from 0.33 to 0.55 will cause a significant reduction in depth of focus. In addition, stronger mask 3D effects can cause pattern dependent shifts in best focus. As a result, the common overlapping process window of several critical patterns can become strongly diminished. The use of anamorphic optics will require two separate half-field exposures to obtain the equivalent of a single full-field exposure on current EUV and DUV scanners. For some chip sizes, this will require stitching two half-fields together to pattern the full chip area. In previous technology nodes, the process window could be improved using SMO and SRAFs. In addition, over the last five years, the industry has put significant effort into studying alternative absorbing materials. These materials can significantly reduce the mask 3D effects by reducing the thickness of the absorber. The use of alternative absorbers alone will not be sufficient for improving the overlapping process window. Instead, several techniques must be simultaneously utilized in order to ensure sufficient overall process window. Optimization of overlapping process windows is critical for successful insertion of high-NA EUVL into HVM. In this paper we analyze how the process window of critical patterns can be optimized by using different optimizations. We will show for realistic mask designs how process window can be improved in different process steps. Double exposure from half-field stitching will also be included in the process evaluation. We use both rigorous and compact modeling in a complimentary fashion for overall process optimization analysis. All techniques presented in this paper accurately model the anamorphic, centrally obscured optics of the upcoming next-generation high-NA scanners.

Proceedings Article | 23 March 2020 Paper

Proteus SMO for process window improvement

Kun-Yuan Chen, Andy Lan, Richer Yang, Jing Jing Liu, Ting Ting Xu, Cheng-Shuan Lin, Hua Ding, Chih-Jie Lee, Thuc Dam, Jianjun Jia

Proceedings Volume 11327, 1132711 (2020) https://doi.org/10.1117/12.2552230

KEYWORDS: Source mask optimization, Photomasks, Semiconducting wafers, Lithography, Nanoimprint lithography, Resolution enhancement technologies, Photovoltaics, Optical proximity correction, Optimization (mathematics), Scanning electron microscopy

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Proceedings Article | 13 March 2018 Paper

Directed Self-Assembly (DSA) for contact applications

Ming-Hui Weng, Tsung-Han Ko, Chih-Jie Lee, Han-Ping Shen, Chieh-Han Wu, Ken-Hsien Hsieh, Yuan-Chien Huang, Cheng-Han Wu, Chung-Ju Lee, Ching-Yu Chang, Chin-Hsiang Lin

Proceedings Volume 10586, 105861D (2018) https://doi.org/10.1117/12.2303492

KEYWORDS: Directed self assembly, Polymethylmethacrylate, Picosecond phenomena, Etching, Scanning electron microscopy, Oxides, Optical lithography, Double patterning technology, Bridges, Polymers

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Showing 5 of 6 publications

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