Silicon photon-counting spectral detectors are promising candidates as the next generation detectors for medical CT. For silicon detectors, a low noise floor is necessary to obtain good detection efficiency. A low noise floor can be obtained by having a slow shaping filter in the ASIC, but this leads to a long dead-time, thus decreasing the count-rate performance. In this work, we evaluate the benefit of utilizing two sub-channels with different shaping times. It is shown by simulation that utilizing a dual shaper can increase the dose efficiency for equal count-rate capability by up to 17%.
We have developed an ultra-fast photon-counting energy-resolved application specific integrated circuit (ASIC)
for spectral computed tomography (CT). A comprehensive characterization has been carried out to investigate
the performance of the ASIC in terms of energy resolution under different photon flux rates and the count
rate linearity in photon-counting mode. An energy resolution of 4.7 % has been achieved for 59.5 keV low flux
photons. The count rate performance of the ASIC was measured with 120 kVp polychromatic x-rays. The results
indicate that the count rate linearity can be kept for a flux rate up to 150 Mphotons s-1 mm-2 with retained
energy information, and this value is increased to be 250 Mphotons s-1 mm-2 in photon-counting mode.
A new silicon strip detector with sub-millimeter pixel size operated in single photon-counting mode has been
developed for use in spectral computed tomography (CT). An ultra fast application specific integrated circuit
(ASIC) specially designed for fast photon-counting application is used to process the pulses and sort them into
eight energy bins. This report characterizes the ASIC and detector in terms of thermal noise (0.77 keV RMS),
energy resolution when electron-hole pairs are generated in the detector diode (1.5 keV RMS) and Poissonian
count rate with retained count rate linearity and energy resolution (200 Mcps•mm-2).
The performance of the photon-counting detector has been tested using a picosecond pulsed laser system to
inject energy into the detector, simulating x-ray interactions. The laser testing results indicate a good energy-discriminating
capability of the detector, assigning the pulses to higher and higher energy bins as the intensity
of the laser pulses are increased.
We model the effect of signal pile-up on the energy resolution of a photon counting silicon detector designed
for high flux spectral CT with sub-millimeter pixel size. Various design parameters, such as bias voltage, lower
threshold level for discarding of electronic noise and the entire electronic read out chain are modeled and realistic
parameter settings are determined. We explicitly model the currents induced on the collection electrodes of a
pixel and superimpose signals emanating from events in neighboring pixels, either due to charge sharing or signals induced during charge collection. Electronic noise is added to the pulse train before feeding it through a model of the read out electronics where the pulse height spectrum is saved to yield the detector energy response function.
The main result of this study is that a lower threshold of 5 keV and a rather long time constant of the shaping filter (τ0 = 30 ns) are needed to discard induced pulses from events in neighboring pixels. These induction currents occur even if no charge is being deposited in the analyzed pixel from the event in the neighboring pixel. There is also only a limited gain in energy resolution by increasing the bias voltage to 1000 V from 600 V. We show that with these settings the resulting energy resolution, as measured by the FWHM/E of the photo peak, is 5% at 70 keV.
Global interconnects have been identified as a serious limitation to chip scaling, due to their limited bandwidth and large delay. A critical analysis of intrinsic limitations of electrical interconnect indicates that these limitations can be overcome. This basic analysis is presented, together with design constraints. We demonstrate a scheme for this, based on the utilization of upper-level metals as transmission lines. A global communication architecture based on a global mesochronous, local synchronous approach allows very high data-rate per wire and therefore very high bandwidth in buses of limited width. As an example, we demonstrate a 320μm wide bus with a capacity of 160Gb/s in a nearly standard 0.18μm process.
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