High aspect ratio (HAR) structures found in three-dimensional nand memory structures have unique process control challenges. The etch used to fabricate channel holes several microns deep with aspect ratios beyond 50:1 is a particularly challenging process that requires exquisitely accurate and precise control. It is critical to carefully analyze multiple aspects of the etch process, such as hole profile, tilt, uniformity, and quality during development and production. X-ray critical dimension (XCD) metrology, which is also known as critical dimension small-angle x-ray scattering, is a powerful technique that can provide valuable insights on the arrangement, shape, and size of periodic arrays of HAR features. XCD is capable of fast, non-destructive measurements in the cell-area of production wafers, making XCD ideal for in-line metrology. Through several case studies, we will show that XCD can be used to accurately and precisely determine key properties of holes etched into hard mask, multilayer oxide/nitride film stacks and slit trenches. We show that the measurement of hole and slit tilt can be achieved without the aid of a structural model using a Fast Tilt methodology that provides sub-nanometer precision. Measurements were performed across several production wafers to determine the etch uniformity and quality. Particular attention was given at the edge of the wafers to account for large variations observed. In addition, we used a detailed physical model to characterize the HAR structures beyond linear tilt. This approach provides a more complete picture of the etch quality.
We have developed a novel in-line solution for the characterization and metrology of high-aspect ratio (HAR) semiconductor structures using transmission small-angle X-ray scattering (SAXS). The solution consists of the Sirius-XCD® tool, NanoDiffract for XCD (NDX) analysis software and high-performance computing infrastructure. The solution provides quantitative information on the orientation and shape of HAR structures, such as 3D NAND channel holes and DRAM capacitors, and can be used for development and control of the critical etch processes used in the formation of such structures. The tool has been designed to minimize expensive cleanroom space without sacrificing performance with typical measurements taking only a few minutes per site. The analysis is done using real-time regression in parallel to the measurements to maximize the throughput of the solution. We will illustrate the key features of the solution using data from a HAR reference wafer and provide results for hole shape and tilt across the wafer together with complimentary data from other techniques. We will also discuss future opportunities for both stand-alone XCD applications and possibilities of XCD-OCD synergies including hybrid metrology in solving complex high-aspect ratio (HAR) and other applications.
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