Nanoimprint lithography (NIL) is a promising technology on next generation lithography for the fabrication of semiconductor devices. NIL is a one-to-one lithographic technology with a contact transfer methodology using templates. Therefore, critical dimension (CD) error and defect performance of templates has direct impact on wafer performance. The previous paper reported that the self-aligned double patterning (SADP) process on master template had better performance on resolution and defect performance [2]. In proceeding with development of SADP template process technology, we found that CD errors occurred in the area with a pattern density change. CD control over any pattern density is one of the critical issues. In this report, we have investigated the impact of the proximity effect correction (PEC) and fogging effect correction (FEC) parameters for electron beam writing on gap space and core space. It was found that the optimal PEC parameter for resist CD is not the best for the core space and the gap space. The resist CD is uniform, but there is a difference in resist shape on the local pattern density variation. It was also found that the core space had dependency on global pattern density even if the optimal FEC parameter for resist CD was applied. FEC can correct resist CD, but it cannot adjust resist shape. By using the optimal PEC and FEC parameters for SADP process, the gap space range of 0.6 nm and the core space range of 0.5 nm were successfully obtained.
KEYWORDS: Photomasks, Inspection, Extreme ultraviolet, Line width roughness, Signal to noise ratio, Deep ultraviolet, Scanning electron microscopy, Critical dimension metrology, Extreme ultraviolet lithography
Deep Ultra Violet (DUV) inspection of Extreme Ultra Violet (EUV) mask has been known for high stability, high throughput, and low cost, since it has been used for a long time, even though sensitivity is thought to be insufficient for the EUV mask of under 20 nm half pitch (hp). We have been studying extendibility for 1X nm hp of the DUV inspection using optics named Super Inspection Resolution Improvement method for UnreSolved pattern (SIRIUS). In previous study, we demonstrated the DUV inspection has capability for the EUV mask of 17 nm hp Lines and Spaces (LS) on wafer. In this paper, the more extendibility for the DUV inspection of EUV masks under sub-15 nm on wafer was demonstrated by studying relationship of roughness and sensitivity. Firstly, an estimated model for effects of the EUV mask roughness to Signal Noise Ratio (SNR) of the inspection image was established, and simulation was carried out. Secondly, the SNR was evaluated using actual Line Width Roughness (LWR) improved masks. It was confirmed that the results are the same trend as the model and the simulation, and, the SNR is enhanced with the LWR improvement. Finally, the sensitivity of the LWR improved mask was evaluated. As a result, it becomes enough for the EUV mask over 13 nm hp on wafer. In conclusion, we confirm that the DUV inspection of the EUV mask by the SIRIUS can be extending to the 13 nm hp LS on wafer, this is around the limit of NA 0.33 EUV lithography, using the LWR improved mask.
It’s generally said that the management of particles is important. In DUV lithography, it’s needed to remove particles on photomask surface not to induce patterning defects on wafer. Moreover, in Nanoimprint lithography (NIL), particles on template cause not only patterning defects on wafer but also its own pattern collapse. Therefore, these particles have to be entirely removed from substrate surface with cleaning technology. In this paper, we proposed ‘Freeze Cleaning’ which has more than 99% PRE for 40nm SiN standard nanoparticle without pattern collapse and critical dimension (CD) shift. And it was also demonstrated that soft defects on template which remained after conv. cleaning could be removed with Freeze Cleaning. These results predict that Freeze Cleaning will contribute to progress of photomask and template technology to next stage.
With shrinkage of device pattern, optical proximity correction (OPC) will be used for EUV lithography, which leads to need sub resolution assist features (SRAF) on EUV mask. Currently, it is difficult to fabricate EUV mask with SRAF of sub-30nm using conventional resist mask process stably. Moreover, it is necessary to improve line width roughness (LWR) of mask absorber pattern for achieving the lithographic specifications beyond hp15nm patterning. In this paper, in order to meet the requirements of Ta based absorber EUV mask with SRAF, mask fabrication process using new structure blank is studied for sub-30nm SRAF patterning and for improved LWR of primary feature. New mask process using new blank with thinner resist and Cr based hard mask was developed. By using new mask process, resolution of absorber pattern was achieved to 30nm for SRAF patterning, and LWR was improved comparing with conventional process.
With shrinking pattern size, mask 3D effects are estimated to become stronger, such as horizontal/vertical shadowing, best
focus shifts through pitch and pattern shift through focus. To reduce these mask 3D effects, we have proposed etched
multilayer EUV mask structure and have also reported on the fabrication process of etched multilayer EUV mask, in which
line and space mask patterning has been demonstrated. And by using etched multilayer EUV mask, the reduction of mask 3D
effects is experimentally demonstrated. In our previous study, we have shown etched multilayer EUV mask has enough
durability against chemical erosion in suitable cleaning process.
In this work, to meet the demands of different variation on pattern in etched multilayer mask, especially fabrication process
for sub-60nm pattern based on effective mirror width in dark-field exposure is studied. 60 nm pillar pattern on mask is
obtained using negative tone resist with keeping resolution of line and space pattern. We also examined CD characteristics 60
nm line and space pattern in consideration of effective mirror width. This work represents that etched multilayer EUV mask
is ready for dark-field exposure of 15 nm pattern in wafer.
With shrinking pattern size at 0.33NA EUV lithography systems, mask 3D effects are expected to become stronger, such
as horizontal/vertical shadowing, best focus shifts through pitch and pattern shift through focus. Etched multilayer EUV mask
structures have been proposed in order to reduce mask 3D effects. It is estimated that etched multilayer type mask is also
effective in reducing mask 3D effects at 0.33NA with lithographic simulation, and it is experimentally demonstrated with
NXE3300 EUV Lithography system. We obtained cross-sectional TEM image of etched multilayer EUV mask pattern. It is
observed that patterned multilayer width differs from pattern physical width. This means that effective reflecting width of
etched multilayer pattern is smaller than pattern width measured by CD-SEM.
In this work, we evaluate mask durability against both chemical and physical cleaning process to check the feasibility of
etched multilayer EUV mask patterning against mask cleaning for 0.33NA EUV extension. As a result, effective width can be
controlled by suitable cleaning chemicals because sidewall film works as a passivation film. And line and space pattern
collapse is not detected by DUV mask pattern inspection tool after mask physical cleaning that includes both megasonic and
binary spray steps with sufficient particle removal efficiency.
Recently, development of next generation extremely ultraviolet lithography (EUVL) equipment with high-NA
(Numerical Aperture) optics for less than hp10nm node is accelerated. Increasing magnification of projection
optics or mask size using conventional mask structure has been studied, but these methods make lithography cost
high because of low through put and preparing new large mask infrastructures. To avoid these issues, etched
multilayer EUV mask has been proposed. As a result of improvement of binary etched multilayer mask process,
hp40nm line and space pattern on mask (hp10nm on wafer using 4x optics) has been demonstrated. However,
mask patterns are easily collapsed by wet cleaning process due to their low durability caused by high aspect ratio.
We propose reducing the number of multilayer pairs from 40 to 20 in order to increase durability against
multilayer pattern collapse. With 20pair multilayer blank, durable minimum feature size of isolated line is
extended from 80nm to 56nm. CD uniformity and linearity of 20pair etched multilayer pattern are catching up
EUV mask requirement of 2014.
Recently, development of next generation extremely ultraviolet lithography (EUVL) equipment with high-NA
(Numerical Aperture) optics for less than hp10nm node is accelerated. While studying more than 0.45 NA,
incident angle distribution of EUV light irradiation to mask becomes larger. It induces degradation of exposure
margin to form horizontal line pattern (perpendicular to EUV light direction) because of large mask 3D effect. In
order to resolve this issue, we evaluate binary etched multilayer mask structure, unlike conventional stacked
absorber structure.
As a result of improvement of binary etched multilayer mask process, hp40nm line and space pattern on mask
(hp10nm on wafer using 4X optics) is demonstrated.
This result suggests the capability of high-NA EUVL with 6inch and 4X optics with new mask structure.
For EUVL mask with thinner absorber, it is necessary to make black border area in order to suppress the leakage of the EUV light from the adjacent exposure shots
Black border of etched multilayer is promising structure in terms of light-shield capability and mask process simplicity. However, EUVL masks with this structure do not have electrical conductivity between the inside and the outside of black border. Inspection area including device patterns belongs to the inside of the black border. In case that quality check for EUVL masks is performed with E-beam inspection, the area is floating. As a result, electrification to mask pattern occurs and causes degradation of E-beam inspection accuracy when the mask is inspected by E-beam inspection tool.
In this paper, we refine EUVL mask structure with black border of etched multilayer in order to improve electrical conductivity. We will show evaluation results of E-beam inspection accuracy, and discuss specifications of electrically conductive black border area.
A new photomask technology with the Advanced Binary Film (ABF) by HOYA has been established. The film of
relatively low thickness is expected to show the best lithography performance. The simple film structure of thin film of
chemically amplified resist, as a mask layer for etching, on the thin ABF film enables us to obtain sub-50nm small
features in a photomask. The thinness of the film also helps to avoid pattern collapse in cleaning steps. The photomask
with ABF expecting the best currently available lithography performance shows the best achievable durability for use in
ArF lithography process steps and the best attainable feasibility in the fabrication process steps for leading edge
photomasks.
Extreme ultraviolet lithography (EUVL) is the most promising candidate for the manufacture of devices with a half pitch
of 32 nm and beyond. We are now evaluating the process liability of EUVL in view of the current status of lithography
technology development. In a previous study, we demonstrated the feasibility of manufacturing 32-nm-node devices by
means of a wafer process that employed the EUV1, a full-field step-and-scan exposure tool. To evaluate yield, a test
pattern was drawn on a multilayer resist and exposed. After development, the pattern was replicated in SiO2 film by
etching, and metal wires were formed by a damascene process. Resolution enhancement is needed to advance to the 22-
nm node and beyond, and a practical solution is off-axis illumination (OAI). This paper presents the results of a study on
yield improvement that used a 32-nm-node test chip, and also clarifies a critical issue in the use of EUVL in a wafer
process for device manufacture at the 22-nm node and beyond.
This work concerns the readiness of extreme ultraviolet lithography (EUVL) for high-volume manufacturing based on accelerated development in critical areas, and the construction of a process liability (PL) test site that integrates results in these areas. Overall lithography performance is determined from the performance of the exposure tool, the printability obtainable with the resist, mask fabrication with accurate critical dimension (CD) control, and correction technology for mask data preparation. The EUV1 exposure tool can carry out exposure over the full field (26 × 33 mm) at a resolution high enough for 32-nm line-and-space patterns when Selete Standard Resist 3 (SSR3) is used. The effect of flare on CD variation is a critical issue in EUVL, so flare is compensated for based on the point spread function for the projection optics of the EUV1 and aerial simulations that take resist blur into account. Production readiness of EUVL based on the integration of results in these areas is evaluated by electrical tests on low-resistance tungsten wiring. We find the PL test site to be very useful for determining where further improvements need to be made and for evaluating the production readiness of EUVL.
Extreme Ultra Violet Lithography (EUVL) is the most leading next generation lithographic
technology post ArF immersion lithography. The Structure of EUV mask differ from traditional
photomask., especially backside coating.
E-chuck is employed to fix the EUV mask on the scanner. Therefore a conductive film on
backside of the EUV mask blank is needed. We investigated what have an influence on mask
manufacturing process caused by the backside coating differed from a traditional photomask.
From our experiment, at the mask fabrication process, especially RIE process to etch Ta
absorber, the CD variation is occurred by electric conduction between the backside conductive
coating and the absorber on the Mo/Si multi-layer.
As a result, the EUV mask blank without electric conduction between the backside conductive
coating and the absorber on the Mo/Si multilayer is necessary.
This paper concerns the readiness of extreme ultraviolet lithography (EUVL) for high-volume manufacture based on
accelerated development in critical areas and the construction of a process liability (PL) test site that integrates results in
these areas. The overall lithography performance was determined from the performance of the exposure tool, the
printability obtainable with the resist, mask fabrication with accurate critical dimension (CD) control, and correction
technology for mask data preparation. The EUV1 exposure tool can carry out exposure over the full field (26 mm × 33
mm) at a resolution high enough for 32-nm line-and-space patterns when Selete Standard Resist 3 (SSR3) is used. Thus,
the test site was designed for the full-field exposure of various pattern sizes [half-pitch (hp) 32-50 nm]. The CD variation
of the mask was found to be as good as 2.8 nm (3σ); and only one printable defect was detected. The effect of flare on
CD variation is a critical issue in EUVL; so flare was compensated for based on the point spread function for the
projection optics of the EUV1 and aerial simulations that took resist blur into account. The accuracy obtained when an
electronic design automation (EDA) tool was used for mask resizing was found to be very good (error ≤ ±2 nm). Metal
wiring patterns with a size of hp 32 nm were successfully formed by wafer processing. The production readiness of
EUVL based on the integration of results in these areas was evaluated by electrical tests on low-resistance tungsten
wiring. The yield for the electrically open test for hp 50 nm (32-nm logic node) and hp 40 nm (22-nm logic node) were
found to be over 60% and around 50%, respectively; and the yield tended to decrease as patterns became smaller. We
found the PL test site to be very useful for determining where further improvements need to be made and for evaluating
the production readiness of EUVL.
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