Shrinking on-product overlay (OPO) budgets in advanced technology nodes require more accurate overlay measurement and better measurement robustness to process variability. Pupil-based accuracy flags have been introduced to the scatterometry-based overlay (SCOL) system to evaluate the performance of a SCOL measurement setup. Wavelength Homing is a new robustness feature enabled by the continuous tunability of advanced SCOL systems using a supercontinuum laser light source in combination with a flexible bandpass filter. Inline process monitoring using accuracy flags allows for detection, quantification and correction of shifts in the optimal measurement wavelength. This work demonstrates the benefit of Wavelength Homing in overcoming overlay inaccuracy caused by process changes and restoring the OPO and residual levels in the original recipe.
As semiconductor technology nodes keep shrinking, ever-tightening on-product overlay (OPO) budgets coupled with continuous process development and improvement make it critical to have a robust and accurate metrology setup. Process monitoring and control is becoming increasingly important to achieve high yield production. In recently introduced advanced overlay (OVL) systems, a supercontinuum laser source is applied to facilitate the collection of overlay spectra to increase measurement stability. In this paper, an analysis methodology has been proposed to couple the measured overlay spectra with overlay simulation to extract exact process information from overlay spectra. This paper demonstrates the ability to use overlay spectra to capture and quantify process variation, which in turn can be used to calibrate the simulation stacks used to create the SCOL (scatterometry-based overlay) and AIM overlay metrology targets, and can be fed into the fab for process monitoring and improvement.
Self-aligned quadruple patterning (SAQP) processes have found widespread acceptance in advanced technology nodes to drive device scaling beyond the resolution limitations of immersion scanners. Of the four spaces generated in this process from one lithography pattern two tend to be equivalent as they are derived from the first spacer deposition. The three independent spaces are commonly labelled as α, β and γ. α, β and γ are controlled by multiple process steps including the initial lithographic patterning process, the two mandrel and spacer etches as well as the two spacer depositions. Scatterometry has been the preferred metrology approach, however is restricted to repetitive arrays. In these arrays independent measurements, in particular of alpha and gamma, are not possible due to degeneracy of the standard array targets. . In this work we present a single target approach which lifts the degeneracies commonly encountered while using product relevant layout geometries. We will first describe the metrology approach which includes the previously described SRM (signal response metrology) combined with reference data derived from CD SEM data. The performance of the methodology is shown in figures 1-3. In these figures the optically determined values for alpha, beta and gamma are compared to the CD SEM reference data. The variations are achieved using controlled process experiments varying Mandrel CD and Spacer deposition thicknesses.
We demonstrate a novel method to establish a root cause for an overlay excursion using optical Scatterometry metrology. Scatterometry overlay metrology consists of four cells (two per directions) of grating on grating structures that are illuminated with a laser and diffracted orders measured in the pupil plane within a certain range of aperture. State of art algorithms permit, with symmetric considerations over the targets, to extract the overlay between the two gratings. We exploit the optical properties of the target to extract further information from the measured pupil images, particularly information that maybe related to any change in the process that may lead to an overlay excursion. Root Cause Analysis or RCA is being developed to identify different kinds of process variations (either within the wafer, or between different wafers) that may indicate overlay excursions. In this manuscript, we demonstrate a collaboration between Globalfoundries and KLA-Tencor to identify a symmetric process variation using scatterometry overlay metrology and RCA technique.
As leading edge lithography moves to advanced nodes in high-mix, high-volume manufacturing environment, automated control of critical dimension (CD) within wafer has become a requirement. Current control methods to improve CD uniformity (CDU) generally rely upon the use of field by field exposure corrections via factory automation or through scanner sub-recipe. Such CDU control methods are limited to lithography step and cannot be extended to etch step. In this paper, a new method to improve CDU at post etch step by optimizing exposure at lithography step is introduced. This new solution utilizes GLOBALFOUNDRIES’ factory automation system and KLA-Tencor’s K-T Analyzer as the infrastructure to calculate and feed the necessary field by field level exposure corrections back to scanner, so as to achieve the optimal CDU at post etch step. CD at post lithography and post etch steps are measured by scatterometry metrology tools respectively and are used by K-T Analyzer as the input for correction calculations. This paper will explain in detail the philosophy as well as the methodology behind this novel CDU control solution. In addition, applications and use cases will be reviewed to demonstrate the capability and potential of this solution. The feasibility of adopting this solution in high-mix, high-volume manufacturing environment will be discussed as well.
As leading edge lithography moves to advanced nodes which requires better critical dimension (CD) control ability within wafer. Current methods generally make exposure corrections by field via factory automation or by sub-recipe to improve CD uniformity. KLA-Tencor has developed a method to provide CD uniformity (CDU) control using a generated Focus/Exposure (F/E) model from a representative process. Exposure corrections by each field can be applied back to the scanner so as to improve CD uniformity through the factory automation. CDU improvement can be observed either at after lithography or after etch metrology steps. In addition to corrections, the graphic K-T Analyzer interface also facilitates the focus/exposure monitoring at the extreme wafer edge. This paper will explain the KT CDFE method and the application in production environment. Run to run focus/exposure monitoring will be carried out both on monitoring and production wafers to control the wafer process and/or scanner fleet. CDU improvement opportunities will be considered as well.
KEYWORDS: Metals, Scatterometry, Silicon, Transmission electron microscopy, Metrology, Semiconducting wafers, Critical dimension metrology, Data modeling, Back end of line, Semiconductors
The ability to extract critical parameters using scatterometry depends on the parameter sensitivity and correlation at
different wavelengths. These, in turn, determine the key metrics: accuracy, precision, and tool-to-tool matching.
Parameter sensitivity and correlation can vary drastically, depending on whether the oblique incident light beam is
parallel (azimuth angle = 90 degrees), perpendicular (azimuth angle = 0 degrees), or at an intermediate angle to the
measured structures. In this paper, we explore the use of both variable- and multiple-azimuth (AZ) (or multi-AZ) angle
spectroscopic ellipsometry (SE) to optimize the measurement performance for different applications.
The first example compares the sensitivity and results using SE at 0 and 90 degree AZ angles for a BEOL post-litho
metal trench application. We observe up to a sixfold improvement in key metrics for critical parameters using 90
degree over 0 degree AZ angle spectra.
The second example illustrates the benefits of a multiple-AZ angle approach to extract critical parameters for a two-dimensional
logic High-K Metal Gate (HKMG) structure. Typically, this approach simultaneously fits two sets of SE
spectra collected from the same location on the wafer at different AZ angles with the same physical model. This helps
both validate and decorrelate critical parameters, enabling robust measurements. Results show that, for this application,
the measurement performance metrics for each critical parameter are improved in almost every case.
KEYWORDS: Copper, Scatterometry, Back end of line, Metals, Critical dimension metrology, Semiconducting wafers, Chemical mechanical planarization, Metrology, Inspection, Dielectrics
Implementations of scatterometry in the back end of the line (BEOL) of the devices requires design of advanced
measurement targets with attention to CMP ground rule constraints as well as model simplicity details. In this paper
we outline basic design rules for scatterometry back end targets by stacking and staggering measurement pads to
reduce metal pattern density in the horizontal plane of the device and to avoid progressive dishing problems along
the vertical direction. Furthermore, important characteristics of the copper shapes in terms of their opaqueness and
uniformity are discussed. It is shown that the M1 copper thicknesses larger than 100 nm are more than sufficient for
accurate back end scatterometry implementations eliminating the need for modeling of contributions from the buried
layers. AFM and ellipsometry line scans also show that the copper pads are sufficiently uniform with a sweet spot
area of around 20 μm. Hence, accurate scatterometry can be done with negligible edge and/or dishing contributions
if the measurement spot is placed any where within the sweet spot area. Reference metrology utilizing CD-SEM and
CD-AFM techniques prove accuracy of the optical solutions for the develop inspect and final inspect grating
structures. The total measurement uncertainty (TMU) values for the process of record line width are of the order of
0.77 nm and 0.35 nm at the develop inspect and final inspect levels, respectively.
This paper discusses the scatterometry-based measurement of a complex thin-spacer PFET structure containing an
embedded SiGe (eSiGe) trench. The thickness of the spacer and the overfill of the eSiGe trench are critical
measurement parameters for such a structure. Although the corresponding NFET structure does not contain the eSiGe-filled
trench, it is also found to be a good barometer of thin-spacer measurement capability and so is also used in the
study. First, the paper discusses the dispersion analysis challenges and approaches for these 45 nm node structures.
Next, two sets of scatterometry hardware, one in production and one under development, are used to measure the critical
parameters in order to understand the differences in measurement performance between the systems. Transmission
Electron Microscopy (TEM) analysis is used as a reference metrology to assess the accuracy performance of the
hardware. Results show that the advanced optics of the newer system significantly improves the dynamic repeatability
of the parameters compared to the older system, while the newer system's extended wavelength range down into the
deep UV (DUV) can provide a noticeable improvement in measurement accuracy due to the significantly greater
parameter sensitivity in this wavelength range.
Within the past few years, scatterometry has been embraced for many in-line measurement and disposition applications
in the semiconductor industry. Yet, there remains some hesitation to fully rely on scatterometry for advanced process
development, and instead to depend on CDSEMs and traditional failure analysis imaging methods (cross-section, TEM,
FIB) to provide CD as well as profile information. This paper investigates whether scatterometry can be used as a
suitable tool to supplement and sometimes replace XSEM metrology, and is an extension of the work from M.
Sendelbach et. al. entitled "Improving STI etch process development by replacing XSEM metrology with scatterometry"
from the 2005 SPIE Microlithography conference. A very large number of cross-sections were completed on the
scatterometry grating targets as well as in-line disposition target and compared to optical measurements of the gratings
with the purpose of decisively answering this question. The targets used for this work were etched 65nm node NFET
gate structures. Measurements from cross-sections and scatterometry were processed to understand the top CD, middle
CD, bottom CD and sidewall angle correlations.
The investigation led to some interesting results, such as the existence of significant variation within a grating. In fact,
there was enough variation to indicate that one or a few cross-sections may not represent the actual process or the
"average" state of an array of lines, making XSEM metrology a poor quantitative method when used for process
development. Scatterometry measurements of middle and bottom CDs show excellent correlation to cross-section
results of both the grating and disposition targets.
A non-destructive and fast optical solution for characterization of 3D deep trench mask open structures containing
two holes per unit cell is presented. It is discussed that measurement sensitivity depends on wafer orientation. A
weighted reference measurement system using data from scatterometry combined with CD-SEM and CD-AFM
techniques after HF removal of the top BSG layer demonstrates adequate performance of scatterometry for high
aspect ratio 3D process control implementations. For example the BCD major and minor axis scatterometry total
measurement uncertainty values are about a factor 2 better than the corresponding results obtained using CD-SEM
and CD-AFM. While scatterometry data exhibit close to unity slope for both TCD and BCD, corresponding CD-SEM
and CD-AFM performances show significantly stronger dependence on depth. Hence, Scatterometry
sensitivity to CD variation is less depth sensitive which is a preferred high volume manufacturing property.
The comparison of scatterometry measurements of complex spacer structures to electrical test measurements is
discussed. Details of the NFET and PFET structures are presented, along with a summary of the scatterometry models
used to represent the structures. Before comparison data are shown, a methodology and set of metrics are presented that
assist in the analysis and interpretation of comparison data. The methodology, called Prediction Analysis, has its roots
in TMU analysis, where both measurements are subject to error. But in Prediction Analysis, an "apples-to-apples"
comparison of the measurements is not the goal, and the measurements may be reported in different units. The goal of
Prediction Analysis is to analyze the components of error in a correlation and use this analysis to predict a measurement
based on the knowledge of another measurement, such that the predicted measurement is bounded. This method is used
in this work to determine how well scatterometry measurements of certain parameters correlate to electrical
measurements of gate resistance, gate Lpoly, and transistor current Ion. Clear correlations are demonstrated, and physical
explanations that explain these correlations are presented. Due to the correlations, the scatterometry measurements can
be used as a predictor of electrical performance significantly before the electrical test occurs. Because of this,
scatterometry can be a reliable measurement technique for improving spacer controls and reducing the mean time to
detect (MTTD) some profile abnormalities.
For years, scatterometers have been providing full profile information on line/space arrays. These profiles are often compared to XSEM images in order to show how well they match. This is done by placing the profiles and images next to each other or by overlapping them. The comparisons, however, are typically qualitative; this makes it difficult to determine exactly how good the match is. Furthermore, this qualitative comparison makes it difficult to determine whether profiles from one scatterometry tool or model match corresponding XSEM images better than another tool's or model's profiles. This study circumvents this problem by making multiple measurements of critical dimension, sidewall angle, and height/depth from XSEM images, and then comparing them to scatterometry measurements previously collected from the same locations. The vehicle that is used for this study is a series of etched STI wafers that were subjected to a range of etch processes. Total Measurement Uncertainty (TMU) analysis is used to properly quantify the comparisons. Both scatterometry library and regression models are investigated; the results from both of these methods are compared to the XSEM measurements and to each other. A technique to estimate the accuracy of the XSEM measurements themselves is also used. Results show that, within statistical error, both scatterometry methods provide the same information about the samples. Furthermore, the data reveal that the scatterometer is in most cases about as accurate as the XSEM metrology in quantifying significant structural components of the samples. Finally, examples showing how the increased sampling of scatterometry can be used to improve etch process development is provided.
Currently, CD-SEMs are the tool of choice for in-line gate length measurements for most semiconductor manufacturers. This is in large part due to their flexibility, throughput, and ability to correlate well to physical measurements (e.g., XSEM). However, scatterometry is being used by an increasing number of manufacturers to monitor and control gate lengths. But can a scatterometer measure such small critical dimensions well enough? This paper explores this question by analyzing data taken from wafers processed using 90 nm node technology. These wafers were measured after gate formation (gate final CD) using a CD-SEM as well as a scatterometer. They were then processed into the back-end-of-line and measured electrically. This electrical measurement, called Lpoly, is an important parametric device measurement and is used to screen product before it reaches final electrical test. It is therefore critical for the in-line metrology immediately after gate formation to have excellent correlation to Lpoly. Analysis shows that the scatterometer correlates well to both in-line CD-SEM measurements across multiple structures as well as electrical Lpoly measurements. More importantly, the scatterometer is shown to be approximately equivalent to the CD-SEM when both are correlated to Lpoly. Since several scatterometry targets with different pitches were measured, the amount of correlation as a function of pitch is also investigated. Because traditional methods of correlation, such as Ordinary Least Squares (OLS), have severe limitations, Total Measurement Uncertainty (TMU) analysis is used as a highly effective assessment methodology. This paper also shows how TMU analysis is used to improve the scatterometry model and understand the relative contributions from obstacles that hinder the achievement of even better correlations.
A systematic study has been conducted to evaluate accuracy and precision of spectral scatterometry used for two-dimensional (2D) characterization of trenches formed in fluorinated silicon glass (FSG). Experiments were done on short-flow dual-damascene Cu interconnect material. Trench critical dimensions (CD) obtained using KLA-Tencor's spectral scatterometer were correlated with data collected using CD atomic force microscope (AFM), CD scanning electron microscope (SEM) and transmission electron microscope (TEM). 3 major trench characteristics were analyzed: trench width, trench depth and sidewall angle. Spectral scatterometry demonstrated an excellent correlation (above 0.96) with CD AFM and SEM in tested trench width range of (80-240) nm and trench depth range of (410-450) nm. Spectral scatterometry showed acceptable correlation of 0.55 and minimal offset of 0.05 degrees with AFM in tested sidewall angle range of (87.5-89) degrees. Spectral scatterometry has demonstrated better than 1.0 nm and 0.2 degrees dynamic precision (3s) for both width and height and sidewall angle, respectively. We conclude that KLA-Tencor's SpectraCD system is capable of accurate and precise 2D characterization of FSG trenches. We recommend scatterometry as a high throughput and non-destructive metrology for trench linewidth and depth monitoring in low-K dielectric interconnect manufacturing.
KEYWORDS: Single crystal X-ray diffraction, Critical dimension metrology, Semiconducting wafers, Scanning electron microscopy, Process control, Spectroscopy, Spectroscopes, Metrology, Precision measurement, Control systems
Smaller device dimensions and tighter process control windows have created a need for CD metrology tools having higher levels of precision and accuracy. Furthermore, the need to detect and measure changes in feature profiles is becoming critical to in-line process control and stepper evaluation for sub-0.18micrometers technology. Spectroscopic CD (SCDTM) is an optical metrology technique that can address these needs. This work describes the use of a spectroscopic CD metrology tool to measure and characterize the focus and exposure windows for the process. The results include comparison to the established in-line CD-SEM, as well as a cross-section SEM. Repeatability and long-term stability data form a gate level nominal process are also presented.
Semiconductor manufacturers should ensure that their automated critical dimension scanning electron microscopes (CD-SEMs) are maintaining run functionality in addition to providing precise and reliable measurements over time. In the past, chip manufactures have focused more on tracking measurement repeatability because testing for automated run functionality has proven difficult. A new method employing SPC monitoring, e-beam image analysis, line scan tracking, and automation testing has been developed that tests for both measurement and job repeatability. This method will extend the monitor wafer's lifetime, prove useful for day-to-day system qualification, provide a benchmark for SEM qualification following maintenance work, and become an important cornerstone of system matching.
KEYWORDS: Semiconducting wafers, Scanning electron microscopy, Critical dimension metrology, Contamination, Manufacturing, Semiconductor manufacturing, Semiconductors, Electron microscopes, Process control, Imaging systems
Semiconductor manufacturers must ensure that their in-line critical dimension scanning electron microscopes (CD-SEMs) are providing precise and reliable data on a daily basis. As with other process equipment, tool stability and production worthiness is determined by a daily qualification procedure that involves measuring a reference, etched wafer's linewidth and comparing those results to a set target mean. However, repeated exposure to a SEM creates an unacceptable increase in the measured feature's CD. This increase can be disruptive to tool qualification, requires the introduction of new reference wafers, and ultimately limits the tool's availability to production. A new method for daily qualification using a rotating daily job scheme has been developed and employed for monitoring multiple systems at Motorola MOS-13/APRDL. This new procedure allows for better statistical process control, increase the reference wafer's useful life, and provides an easier method of monitoring the tool throughout its lifetime.
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