Four years ago, the EU project PIX4life set out to mature an open access pilot line for silicon nitride integrated photonics, focused on life science applications. The synergies of industrial and academic project partners enabled the creation and validation of a unique pilot line using carefully selected demonstrator projects. Simultaneously, the software infrastructure (process design kits, design tools and building blocks) needed to enable early access of the pilot line through multi-project wafer (MPW) fabrication runs was created. After ten MPW fabrication runs in last three years at two foundries, and successful realization of dozens of designs from the project partners and the external customers, the pilot line is fully operational and ready for open access. In this presentation, we intend to share the experiences we have gained in setting up the pilot line, and to discuss the opportunities and challenges we can expect in future.
Photonics has become critical to life sciences. However, the field is far from benefiting fully from photonics' capabilities. Today, bulky and expensive optical systems dominate biomedical photonics, even though robust optical functionality can be realized cost-effectively on single photonic integrated circuits (PICs). Such chips are commercially available mostly for telecom applications, and at infrared wavelengths. Although proof-of-concept demonstrations for PICs in life sciences, using visible wavelengths are abundant, the gating factor for wider adoption is limited in resource capacity. Two European pilot lines, PIX4life and PIXAPP, were established to facilitate European R and D in biophotonics, by helping European companies and universities bridge the gap between research and industrial development. Through creation of an open-access model, PIX4life aims to lower barriers to entry for prototyping and validating biophotonics concepts for larger scale production. In addition, PIXAPP enables the assembly and packaging of photonic integrated circuits.
An optical backplane based on Wavelength Division Multiplexing (WDM) for onboard data and signal handling is introduced. It is a tunable transmitter fixed receiver architecture incorporating an NxN Arrayed Waveguide Grating (AWG) element for passive data routing between the nodes. In conjunction with star couplers both unicast and multicast capabilities are offered. The control plane has been implemented on a high-speed FPGA and a four-node demonstrator has been built. Bit-Error-Rate (BER) versus power incident on the receiver, employing three different AWGs, has been measured at a data rate of 10Gbps per link. A total switching time of 500ns has been achieved, leading to more than 95% efficiency with packet lengths greater than 10KBytes.
System performance scaling imposes an increase of package-to-package aggregate bandwidths to interface chips in high performance computing. This scaling is expected to encounter several I/O bottlenecks (pin count, speed, power consumption) when implemented in the electrical domain. Several optical interface technologies are being proposed among which silicon photonics, considered as a promising candidate. In this paper we will review the recent progress made in this technology that may enable multi-channel WDM links for package-to-package interconnects: 1.0V drivers with microring modulators and compact manufacturable microring filters with efficient thermal tuning.
ePIXfab-The European Silicon Photonics Support Center continues to provide state-of-the-art silicon photonics solutions to academia and industry for prototyping and research. ePIXfab is a consortium of EU research centers providing diverse expertise in the silicon photonics food chain, from training users in designing silicon photonics chips to fiber pigtailed chips. While ePIXfab provides world-wide users access to advanced silicon photonics it also focuses its attention to expanding the silicon photonics infrastructure through a network of design houses, access partners and industrial collaborations.
Silicon photonics is maturing rapidly on a technology basis, but design challenges are still prevalent. We discuss
these challenges and explain how design of photonic integrated circuits needs to be handled on both the circuit
as on the physical level. We also present a number of tools based on the IPKISS design framework.
A Si photonics platform is described, co-integrating advanced passive components with Si modulators and Ge detectors.
This platform is developed on a 200mm CMOS toolset, compatible with a 130nm CMOS baseline. The paper describes
the process flow, and describes the performance of selected electro-optical devices to demonstrate the viability of the
flow.
Optical coherence tomography (OCT) is a medical imaging technology capable of producing high-resolution, crosssectional
images through inhomogeneous samples, such as biological tissue. It has been widely adopted in clinical
ophthalmology and a number of other clinical applications are in active research. Other applications of OCT include
material characterization and non-destructive testing. In addition to current uses, OCT has a potential for a much wider
range of applications and further commercialization. One of the reasons for slow penetration of OCT in clinical and
industrial use is probably the cost and the size of the current systems. Current commercial and research OCT systems
are fiber/free space optics based. Although fiber and micro-optical components have made these systems portable,
further significant miniaturization and cost reduction could be achieved through the use of integrated photonic
components. We demonstrate a Michelson interferometer using integrated photonic waveguides on nanophotonic silicon
on insulator platform. The size of the interferometer is 1500 μm x 50 μm. The structure has been tested using a mirror as
a reflector. We can achieve 40 μm axial resolution and 25 dB sensitivity which can be substantially improved.
Generic packaging concepts for silicon photonics have been developed in the frame of EU-funded Network of
Excellence ePIXnet (FP6). Three approaches for Silicon photonic packaging will be presented within this paper. Two
concepts provide solutions for fiber array coupling to high-index contrast photonic wire waveguide gratings. Third
concept is the integration of inverted taper-based fiber coupling structure with silicon etched V-grooves. Using
standardized SOI chip designs and commercial available assembly parts, the packaging concepts allow for small
footprint or flexible use in an R&D environment. The work presented here has resulted from cooperation within the
European Network of Excellence ePIXnet.
The interfacing of an optical fiber and a photonic integrated circuit becomes more complex on a high refractive index
contrast waveguide platform due to the large mismatch in mode size between the optical fiber mode and the waveguide
modes in the integrated circuit. In this paper we review our work in the field of diffractive grating structures, in order to
realize a high efficiency, polarization independent, large bandwidth optical interface with high index contrast
waveguides fabricated on the silicon-on-insulator platform.
We discuss silicon photonic wires and components based on this technology, such as filters based on ring resonators,
interferometers or arrayed waveguide gratings. The devices are fabricated using standard CMOS technology,
including 193nm lithography. We also discuss their application in a number of demonstrator devices
within different application fields.
Progress and take-up of photonic integration is hampered by a too large variety in devices and technologies. Generic
integration platforms, which support a broad range of applications and can be made accessible through foundries, can
deliver the cost reduction needed for a broader take-up. Silicon is ideally suited as such a generic integration platform
and can support large-scale photonic integrated circuits. The ePIXnet Silicon Photonics Platform was set up to offer
access to high-end silicon facilities for research and prototyping and to help establish photonic foundry processes on the
longer term, bridging the gap between research and the market.
In this proceeding, we present for the first time, a nested-ring Mach-Zehnder interferometer (NRMZI) on SOI (Silicon-on-
insulator), realized using a CMOS based process. We show that the device operates in two propagating resonance
modes: (1) The inner-loop resonant mode due to strong build-up inside the inner-ring and (2) the double Fano-resonance
mode due to strong light interaction with the outer loop. The experimental data shows that the inner-loop resonance is
highly sensitive to the MZI arm imbalance as compared to the double-Fano resonance mode. With such considerations, a
good fit is acquired between theory and experiment.
We propose a finesse enhancement scheme by a simple two-ring system, in which the resonance finesse is dependent on
the relative intensity buildup of the second ring with respect to the first. In lossless case, it is possible to obtain finesse
two orders of magnitude higher than that of the single ring system. The two-ring system is fabricated in silicon-on-insulator
using deep UV (DUV) lithography and shown to exhibit the finesse of 100 to 300. The associated finesse
enhancement of 20 is in a good agreement with the theory.
A wavelength division multiplexing (WDM)-based optical backplane architecture is introduced. It is a tunable transmitter fixed receiver (TT-FR) architecture incorporating an N×N arrayed waveguide grating (AWG) element for passive data routing between the nodes, which in conjunction with star couplers, offers both unicast and multicast capabilities. The data and control plane of the network are implemented on a high-speed field programmable gate array (FPGA), and a four-node demonstrator is built up. Three different types of AWG routing elements implemented in different technologies are employed, and bit error rate (BER) versus incident power on the receiver measurements are presented for a data rate of 10 Gbps per link. A total switching time as low as 500 ns is achieved, permitting packet switching operation with more than 95% efficiency when the packet length is greater than 10 kbytes.
We will present recent progress in several devices based on silicon-on-insulator nanophotonics using deep-UV lithography. We will report on high efficiency grating couplers, ultra-compact arrayed waveguide gratings and ring-resonator based biosensors.
We investigate the significance of secondary effects caused by free carrier accumulation and subsequent heating on the nonlinear behaviour of ultrasmall Silicon-On-Insulator ring resonators. All-optical bistability based on thermal dispersion was experimentally obtained for an input power of only 0.28mW. At higher powers, pulsating behaviour was observed which is problematic for the stability of thermal memory and switching operations. Using free carrier dispersion, we also demonstrate all-optical wavelength conversion with a pulse length of 10 ns, indicating that bitrates of 0.1 Gb/s are feasible. Also here, the presence of unstable pulsations was observed, leading to significant errors in the converted data pattern.
We present the heterogeneous integration of InP/InGaAsP photodetectors onto ultracompact Silicon-on-Insulator (SOI) waveguide circuits using benzocyclobutene (BCB) die to wafer bonding. This technology development enables the integration of a photonic interconnection layer on top of CMOS. Fabrication processes were optimized and the transfer of a passive Silicon-on-Insulator waveguide layer using BCB was assessed.
Nanophotonics promise a dramatic scale reduction compared to contemporary photonic components. This allows the integration of many functions onto a chip. Silicon-on-insulator (SOI) is an ideal material for nanophotonics. It consists of a thin layer of silicon on top of an oxide buffer. In combination with high-resolution lithography, one can define a high refractive index contrast both in horizontally and vertically, resulting in a tight confinement of light. Moreover, SOI can be processed with industrial tools now used for silicon microelectronics. There are two candidates for nanophotonic waveguides. Photonic wires are basically conventional waveguides with reduced dimensions and a high refractive index contrast. These waveguides with submicron dimensions can have bend radii of only a few micrometres. The alternative is to use photonic crystals, which confine light by the photonic band gap effect. Introducing defects in a photonic crystal creates waveguides and other functional components. To make nanophotonics commercially viably, mass-manufacturing technology is needed. While e-beam lithography delivers the required accuracy for nanophotonic structures, it is too slow. We have used deep-UV lithography, used for advanced CMOS fabrication, to make nanophotonic waveguides. The fabrication quality is very good, which translates to low propagation losses. E.g. a 500nm (single-mode) photonic wire has a propagation loss of only 0.24dB/mm. Using these low-loss waveguides, we have implemented a variety of nanophotonic components, including ring resonators and arrayed waveguide gratings.
Silica on Silicon (SoS) and Silicon on insulator (SOI) fabrication technologies are now yielding efficient photonic devices that have potential uses (e.g. routing and switching) in multigigabit optical backplane interconnect applications. The ever increasing demands for higher speed data handling and greater throughput on board both operational and experimental satellites necessitate an examination of these technologies for their robustness and performance in a space environment. One of the main environmental stressors on electronic and photonic components is the incident radiation flux. This paper reports results from the experimental testing of two classes of photonic devices; namely a SoS arrayed waveguide grating (AWG), and a SOI ring resonator. For a total ionizing dose of 300 kRad Co60 gamma irradiation, the SOI ring resonator showed induced spectral shifts as lower than 0.4 pm/kRad, and the SoS AWG showed a maximum shift of 0.03 pm/kRad in one channel. The relatively low AWG radiation sensitivity tempt us to say that these devices could be considered radiation hard for the telecom CL wavelength band (1550 nm) in which these measurements were made.
We fabricated single-mode photonic wires, nanophotonic waveguides confining light by total internal reflection. The structures are defined in silicon-on-insulator using 248nm deep UV lithography, a widely adopted technology for CMOS applications. The crystalline silicon core has a thickness of 220nm and a width of up to 600nm. A 1um thick silica layer serves as the lower cladding. We measured the loss of straight waveguides using the Fabry-Perot interference spectrum of the cleaved samples. A 500nm wide waveguide has a loss as low as 2.4dB/cm at 1550nm wavelength. We measured 90 degree bends to have excess losses of about 1dB. Mirror bends perform comparably. We fabricated symmetrically coupled ring and "racetrack" resonators with small radius. Q-factors higher than 3000 are achieved, leading to low add-drop crosstalk, high finesse and low at-resonance insertion loss. By fitting the theoretical model to the experimental results, we extracted parameters such as the coupling ratio, cavity loss and group index. We analyzed the fabrication tolerances allowed for these resonators to be suitable as a building block for WDM filtering components. The allowed deviation on the waveguide widths and gaps for the coupling ratio to be within specification are within the possibilities of the fabrication method. However, a method to tightly control the optical cavity length is needed as the ring's group index is highly dependent on waveguide width.
Nanophotonic ICs promise to play a major role in the future of opto-electronic signal processing and telecommunications. But for these devices, which consist of large numbers of wavelength-scale photonic components, to be successful, reliable and cost-effective mass-fabrication technology is needed. Photonic components, and among them photonic crystals, require a high degree of accuracy, which translates to low fabrication tolerances. Today, similar demands are made for high-end CMOS components, made of Silicon, for which a large manufacturing base is installed.
We demonstrate the fabrication of nanophotonic components, like photonic crystal waveguides and photonic wires, using state-of-the-art CMOS processing tools. The foremost of these is deep UV lithography at 248nm and 193nm, combined with dry-etch processes. To maintain compatibility with standard CMOS processes, we use Silicon-on-Insulator (SOI) as our material system. SOI is transparent at telecom wavelengths and provides a good substrate for high-index contrast optical waveguides. Moreover, recent studies have shown that nanophotonic components in SOI are less sensitive to surface roughness than similar components made in III-V semiconductor.
Although deep UV lithography cannot attain the resolution of e-beam lithography, this can be compensated with thorough process characterization, and the technique offers more speed because of its parallel nature. We will illustrate this with experimental results, and will also discuss some of the issues that have arisen in the course of this project.
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