Analyses of unit process trace data are critical components of modern semiconductor manufacturing process control. While process development environments share many characteristics with manufacturing environments, development tools and processes may not be suitable candidates for the deployment of traditional trace analytics such as FDC applications. Here we describe the adaptive use of large scale, proactive process trace monitoring and reactive root cause analytics for supporting development operations. The large-scale monitoring application we have deployed is comprehensive in scope and scale and focusses on monitoring the stability of a chamber over time. The reactive root cause application we have deployed automatically searches large trace data spaces to identify trace data elements with potentially interesting relationships to variations in on-wafer measurements and is designed to handle the small sample sizes encountered frequently in development operations.
Extending extreme ultraviolet (EUV) single exposure patterning to its limits requires more than photoresist development. The hardmask film is a key contributor in the patterning stack that offers opportunities to enhance lithographic process window, increase pattern transfer efficiency, and decrease defectivity when utilizing very thin film stacks. This paper introduces the development of amorphous silicon (a-Si) deposited through physical vapor deposited (PVD) as an alternative to a silicon ARC (SiARC) or silicon-oxide-type EUV hardmasks in a typical trilayer patterning scheme. PVD offers benefits such as lower deposition temperature, and higher purity, compared to conventional chemical vapor deposition (CVD) techniques. In this work, sub-36nm pitch line-space features were resolved with a positive-tone organic chemically-amplified resist directly patterned on PVD a-Si, without an adhesion promotion layer and without pattern collapse. Pattern transfer into the underlying hardmask stack was demonstrated, allowing an evaluation of patterning metrics related to resolution, pattern transfer fidelity, and film defectivity for PVD a-Si compared to a conventional tri-layer patterning scheme. Etch selectivity and the scalability of PVD a-Si to reduce the aspect ratio of the patterning stack will also be discussed.
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