The passivation of silicon surfaces play an important role for achieving high-efficiency crystalline silicon solar cells. In this work, a stack system comprising of 20nm Al2O3 with a 22nm TiO2 topping layer was deposited on p-type Si using thermal atomic layer deposition (ALD) and was investigated regarding its passivation quality. Quasi-steady-state photo conductance (QSSPC) measurements reveal that the minority carrier lifetime at an injection density of 1015cm−3 increased from 1.10ms to 1.96ms after the deposition of TiO2, which shows that the deposition of TiO2 onto Al2O3 is capable of enhancing its passivation quality. Capacity voltage (CV) measurements show that the amount of negative charges in the dielectric layer has increased from -2.4·1012cm−2 to -6.3·1012cm−2 due to the deposition of TiO2. The location of the additional charges was analyzed in this work by etching the dielectric layer stack in several steps. After each step CV measurements were performed. It is found that the additional negative charges are created within the Al2O3 layer. Additionally, ToF-SIMS measurements were performed to check for diffusion processes within the Al2O3 layer.
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