E-beam inspection based on voltage-contrast (VC) defect metrology has been widely utilized for failure mode analysis of memory devices. Variation in e-beam image contrast indicates shorts, opens, and void defect inline inspection in the idle of production line. Meanwhile, accurate measurement of threshold voltage and the source–drain current is required to characterize memory cell through multilayers. However, in the subthreshold region of memory cell, VC is weakened due to gate voltage stimulated by electron dose of e-beam scanning. We developed a modulated beam imaging with the SEM vector scan system to enhance VC contrast and defect inspection capability. Reliability of the modulated electron microscopy is validated by comparing with physical probing test result for process variation of Boron doping and annealing conditions in full wafer processing. VC with the modulated electron microscopy is well correlated to the probing test result. Image contrast of the modulated microscopy can differentiate contact via on floating circuit and disconnected floating circuit. We applied the modulated electron microscopy for inline electrical defect detection at the middle of manufacturing line of integrated circuits. The defect distribution map by the modulated electron microscopy was confirmed to reproduce the physical probe test result. By achieving inline electrical characterization before back end of line, yield loss issues can be detected and characterized 2 weeks earlier than conventional method. Moreover, this ability to detect and characterize memory cell issues inline is supposed to contribute to overcome the yield learning cycle bottleneck.
Seeing an increasingly critical role of MI in the semiconductor industry, in this keynote, we will first review the evolution of the MI technologies in the last few decades, and then discuss the challenges we are presently engaging in, focusing on the EUV era metrology topics: thin resist, 3D and massive measurement. Most importantly, as an obligation of one of the leading equipment suppliers in this field, we will present a vision for the future technologies, in response to the keynotes from the device makers in recent years, mainly focus on electron beam tools but also to cover a certain range of different field technologies.
E-beam inspection based on voltage-contrast defect metrology has been widely utilized for failure mode analysis of memory devices. Variation in E-beam image contrast indicates shorts, opens and void defect inline inspection in the idle of production line. Meanwhile, accurate measurement of threshold voltage and the source-drain current is required to characterize memory cell through multi-layers. However, in the subthreshold region of memory cell, voltage contrast (VC) is weakened due to gate voltage stimulated by electron dose of e-beam scanning. We developed a modulated beam imaging with the SEM vector scan system to enhance VC contrast and defect inspection capability. Reliability of the modulated electron microscopy is validated by comparing with physical probing test result for process variation of Boron doping and annealing conditions in full wafer processing. VC with the modulated electron microscopy is well correlated to the probing test result. Image contrast of the modulated microscopy can differentiate contact via on floating circuit and disconnected floating circuit. We applied the modulated electron microscopy for in-line electrical defect detection at the middle of manufacturing line of integrated circuits. The defect distribution map by the modulated electron microscopy was confirmed to reproduce the physical probe test result. By achieving in-line electrical characterization before back end of line, yield loss issues can be detected and characterized two weeks earlier than conventional method. Moreover, this ability to detect and characterize memory cell issues inline is supposed to contribute to overcome the yield learning cycle bottleneck.
As a follow-up to last year’s “What is prevalent CD-SEM's role in EUV era?” [1], here we report our ongoing progress on total metrology solutions for the sub-10-nm extreme ultraviolet (EUV) lithography process. We discuss two technical approaches that have emerged following our previous work. First, similar to conventional minimization processes, we focus on improvements in the top metrology task, down-to-ångström-order tool matching, namely, “atomic matching”, which is a crucially important feature in all in-line metrology tools in the EUV era. Second, we examine a comprehensive solution that enables EUV-characterized featured process monitoring with greater accuracy, higher speed, and smarter metrology.
As industry prepares to introduce extreme ultraviolet (EUV) technology for the coming sub-10-nm lithography, this paper presents metrology approaches that utilize the prevalent Critical Dimension Scanning Electron Microscope (CD-SEM). Two technical approaches will be discussed. One is comprehensive solutions for new EUV characterized features, such as low resist-shrinkage electron beam optics and high efficiency metrology/inspection for EUV process monitoring. The other, like conventional minimization processes, is down-to-ångström-order metrology methodologies required for stricter CD process control. This paper is the first to conceptualize specifications for a stringent and multi-index tool matching, namely “atomic matching,” which is considered as a crucially important feature of any in-line metrology tools in the EUV era.
We have developed the effective method of mask and silicon 2-dimensional metrology. The aim of this method is evaluating the performance of the silicon corresponding to Hotspot on a mask. The method adopts a metrology management system based on DBM (Design Based Metrology). This is the high accurate contouring created by an edge detection algorithm used in mask CD-SEM and silicon CD-SEM.
Currently, as semiconductor manufacture moves towards even smaller feature size, this necessitates more aggressive optical proximity correction (OPC) to drive the super-resolution technology (RET). In other words, there is a trade-off between highly precise RET and mask manufacture, and this has a big impact on the semiconductor market that centers on the mask business. 2-dimensional Shape quantification is important as optimal solution over these problems. Although 1-dimensional shape measurement has been performed by the conventional technique, 2-dimensional shape management is needed in the mass production line under the influence of RET. We developed the technique of analyzing distribution of shape edge performance as the shape management technique. On the other hand, there is roughness in the silicon shape made from a mass-production line. Moreover, there is variation in the silicon shape. For this reason, quantification of silicon shape is important, in order to estimate the performance of a pattern. In order to quantify, the same shape is equalized in two dimensions. And the method of evaluating based
on the shape is popular. In this study, we conducted experiments for averaging method of the pattern (Measurement Based Contouring) as two-dimensional mask and silicon evaluation technique. That is,
observation of the identical position of a mask and a silicon was considered. It is possible to analyze variability of the edge of the same position with high precision. The result proved its detection accuracy and reliability of variability on two-dimensional pattern (mask and silicon) and is adaptable to following fields of mask quality management.
- Estimate of the correlativity of shape variability and a process margin.
- Determination of two-dimensional variability of pattern.
- Verification of the performance of the pattern of various kinds of Hotspots.
In this report, we introduce the experimental results and the application. We expect that the mask measurement and the shape control on mask production will make a huge contribution to mask
yield-enhancement and that the DFM solution for mask quality control process will become much more important technology than ever. It is very important to observe the shape of the same location of Design,
Mask, and Silicon in such a viewpoint.
To realize good repeatability in CD measurements, many issues have to be addressed including system stability, sample
charging and contamination, measurement conditions, and image processing. The S-9380M is a mask CD-SEM (Critical
Dimension Scanning Electron Microscope) system developed for measurement and inspection of 45 nm node photomask.
The S-9380M has several innovations like a newly designed optical system to minimize sample charge-up and drift
effects, ultra-high resolution (3nm) imaging to enable measurements at high magnification, and an integrated ultra-violet
(UV) unit for pre-treatment of the mask to rid the surface of organic contaminants. This paper presents measurements
carried out using the S-9380M system, and showed that superior performance is achieved with short-term dynamic
repeatability of 3σ less than 0.6 nm (for line patterns), and long-term dynamic repeatability of 3σ less than 1.0 nm
without trend modification.
A new electron beam mask writer, HL-7000M, has been developed for mass production of 90 nm node photomask and, research and development of 65 nm node mask. A series of adjustments to improve CD accuracy provides us a novel systematic solution for VSB system optimization. By applying a novel constant-gain method for linearity adjustment,
linearity range, for designed size ranging from 0.3 um to 1.0 um, has been improved to < 3 nm for line and space pattern, the maximum XY discrepancy is 2 nm. Both experimental and theoretical studies for shot-divided patterns, which are often generated in OPC pattern conversion, have been applied. By modification of the shift term in beam size correction, exposure results for such shot-divided patterns, for divided pattern size varied from 500 nm to 1 nm, are improved to be less than 5 nm in range.
HL-7000M electron beam (EB) lithography system has been developed as a leading edge mask writer for the generation of 90 nm node production and 65 nm node development. It is capable of handling large volume data files such as full Optical Proximity Correction (OPC) patterns and angled patterns for System on Chip (SoC). Aiming at the technological requirements of the International Technology Roadmap for Semiconductors (ITRS) 2002 Update, a newly designed electron optics column generating a vector-scan variable shaped beam and a digital disposition system with a storage area network technology have been implemented into HL-7000M. This new high-resolution column and other mechanical components have restrained the beam drift and fluctuation factors. The improved octapole electrostatic deflectors with new dynamic focus correction and gain alignment methods have been built into the object lens system of the column. These enhanced features are worth mentioning due to the achievement of HL-7000M's Image Placement (IP) performance. Its accuracy in 3σ of a 14 x 14 global grid matching result over an area of 135 mm x 135 mm measured by Leica LMS IPRO are X: 6.09 nm and Y: 7.85 nm. In addition, the shot astigmatism correction has been in the development and testing process and is expected to improve the local image placement accuracy dramatically.
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