Paper
19 September 2017 FPGA implementation of image dehazing algorithm for real time applications
Author Affiliations +
Abstract
Weather degradation such as haze, fog, mist, etc. severely reduces the effective range of visual surveillance. This degradation is a spatially varying phenomena, which makes this problem non trivial. Dehazing is an essential preprocessing stage in applications such as long range imaging, border security, intelligent transportation system, etc. However, these applications require low latency of the preprocessing block. In this work, single image dark channel prior algorithm is modified and implemented for fast processing with comparable visual quality of the restored image/video. Although conventional single image dark channel prior algorithm is computationally expensive, it yields impressive results. Moreover, a two stage image dehazing architecture is introduced, wherein, dark channel and airlight are estimated in the first stage. Whereas, transmission map and intensity restoration are computed in the next stages. The algorithm is implemented using Xilinx Vivado software and validated by using Xilinx zc702 development board, which contains an Artix7 equivalent Field Programmable Gate Array (FPGA) and ARM Cortex A9 dual core processor. Additionally, high definition multimedia interface (HDMI) has been incorporated for video feed and display purposes. The results show that the dehazing algorithm attains 29 frames per second for the image resolution of 1920x1080 which is suitable of real time applications. The design utilizes 9 18K_BRAM, 97 DSP_48, 6508 FFs and 8159 LUTs.
© (2017) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Rahul Kumar, Brajesh Kumar Kaushik, and R. Balasubramanian "FPGA implementation of image dehazing algorithm for real time applications", Proc. SPIE 10396, Applications of Digital Image Processing XL, 1039633 (19 September 2017); https://doi.org/10.1117/12.2274682
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CITATIONS
Cited by 4 scholarly publications.
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KEYWORDS
Field programmable gate arrays

Image processing

Algorithm development

Digital signal processing

Image quality

Intelligence systems

Video processing

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