How coherent Ising machines push circuit design in silicon photonics to its limits (Conference Presentation)

Thomas Van Vaerenbergh; Ranojoy Bose; David Kielpinski; Gabriel J. Mendoza; Jason S. Pelc; Nikolas A. Tezak; Charles Santori; Raymond G. Beausoleil

doi:10.1117/12.2288586

14 March 2018 How coherent Ising machines push circuit design in silicon photonics to its limits (Conference Presentation)

Thomas Van Vaerenbergh, Ranojoy Bose, David Kielpinski, Gabriel J. Mendoza, Jason S. Pelc, Nikolas A. Tezak, Charles Santori, Raymond G. Beausoleil

Author Affiliations +

Proceedings Volume 10537, Silicon Photonics XIII; 105370D (2018) https://doi.org/10.1117/12.2288586
Event: SPIE OPTO, 2018, San Francisco, California, United States

Abstract

Coherent Ising machines are a type of optical accelerators that can solve different optimization tasks by encoding the problem in the connection matrix of the network. So far, experimental realizations have been limited to time multiplexed solutions, in which one nonlinear node is present in a feedback loop. In Hewlett Packard Labs, we investigate the implementation of a spatially multiplexed solution, with an array of nominally identical nonlinear nodes. As this avoids the need for a long delayline, this makes the system more suitable for integration and hence mass production. HPE investigated two material platforms with good bulk nonlinearity properties: a-Si and GaAs. For the CMOS compatible a-Si platform, HPE demonstrated a design approach that allows to fabricate 1000 component all-optical computational circuits in a scalable way. In addition, to be able to do layout of Ising machines with ~1000 components, HPE developed highly capable photonic layout that will help across interconnects, sensors, and computation. In the GaAs platform, we focused on reducing the energy per elementary operation down to 1 fJ. The optical gates are designed with a bus-waveguide connectivity using a multi-level layered architecture design that allows waveguide connectivity between optical gates. This allows to separate computation and communication into their own dedicated layers increasing overall performance. Finally, we will highlight how both drastic automation at the layout stage and a tight integration between the electronic control layer (used for tuning of resonances and phase-shifters) and the photonic layer are key to achieve actual scalability to larger circuits.

Conference Presentation

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Thomas Van Vaerenbergh, Ranojoy Bose, David Kielpinski, Gabriel J. Mendoza, Jason S. Pelc, Nikolas A. Tezak, Charles Santori, and Raymond G. Beausoleil "How coherent Ising machines push circuit design in silicon photonics to its limits (Conference Presentation)", Proc. SPIE 10537, Silicon Photonics XIII, 105370D (14 March 2018); https://doi.org/10.1117/12.2288586

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