Content-Addressable Memory Architecture For Image Coding Using Vector Quantization

S. Panchanathan; M. Goldberg

doi:10.1117/12.960466

5 September 1989 Content-Addressable Memory Architecture For Image Coding Using Vector Quantization

S. Panchanathan, M. Goldberg

Proceedings Volume 1099, Advances in Image Compression and Automatic Target Recognition; (1989) https://doi.org/10.1117/12.960466
Event: SPIE 1989 Technical Symposium on Aerospace Sensing, 1989, Orlando, FL, United States

Abstract

In this paper, an architecture suitable for real-time image coding using vector quantization is presented. This architecture is based on the concept of content-addressable memory (CAM) where the data is accessed simultaneously and in parallel on the basis of its content. In vector quantization(VQ), a set of representative vectors (codebook) is generated from a training set of vectors. The input vectors to be coded are quantized to the closest codeword of the codebook and the corresponding index(label) of the codeword is transmitted. Thus, VQ essentially involves a search operation to obtain the best match. Traditionally, the search mechanism is implemented sequentially, where each vector is compared with the codewords one at a time. For K input vectors of dimension L, and a codebook of size N, the search complexity is of order K*L*N which is heavily compute intensive making real-time implementation of VQ algorithm difficult. The architectures reported thus far employ parallelism in the directions of vector dimension L and codebook size N. However, as K>>N for image coding, a greater degree of paralleism can be obtained by employing parallelism in the directions of L and K. This means that matching must be performed from the perspective of the codewords; namely, for a given codeword, all input vectors are evaluated in parallel. A speedup of order K*L results if a content-addressable memory based implementation is employed. This speedup coupled with the gains in the execution time for the basic distortion operation, implies that codebook generation and encoding is possible in real-time (< 15 milliseconds). The regular and iterable architecture is particularly well suited for VLSI implementation.

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S. Panchanathan and M. Goldberg "Content-Addressable Memory Architecture For Image Coding Using Vector Quantization", Proc. SPIE 1099, Advances in Image Compression and Automatic Target Recognition, (5 September 1989); https://doi.org/10.1117/12.960466

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KEYWORDS

Content addressable memory

Image compression

Computer programming

Distortion

Quantization

Automatic target recognition

Detection and tracking algorithms

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