Presentation + Paper
5 March 2021 Wafer-level vacuum sealing for packaging of silicon photonic MEMS
Author Affiliations +
Abstract
Silicon (Si) photonic micro-electro-mechanical systems (MEMS), with its low-power phase shifters and tunable couplers, is emerging as a promising technology for large-scale reconfigurable photonics with potential applications for example in photonic accelerators for artificial intelligence (AI) workloads. For silicon photonic MEMS devices, hermetic/vacuum packaging is crucial to the performance and longevity, and to protect the photonic devices from contamination. Here, we demonstrate a wafer-level vacuum packaging approach to hermetically seal Si photonic MEMS wafers produced in the iSiPP50G Si photonics foundry platform of IMEC. The packaging approach consists of transfer bonding and sealing the silicon photonic MEMS devices with 30 μm-thick Si caps, which were prefabricated on a 100 mm-diameter silicon-on-insulator (SOI) wafer. The packaging process achieved successful wafer-scale vacuum sealing of various photonic devices. The functionality of photonic MEMS after the hermetic/vacuum packaging was confirmed. Thus, the demonstrated thin Si cap packaging shows the possibility of a novel vacuum sealing method for MEMS integrated in standard Si photonics platforms.
Conference Presentation
© (2021) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Gaehun Jo, Pierre Edinger, Simon J. Bleiker, Xiaojing Wang, Alain Yuji Takabayashi, Hamed Sattari, Niels Quack, Moises Jezzini, Peter Verheyen, Göran Stemme, Wim Bogaerts, Kristinn B. Gylfason, and Frank Niklaus "Wafer-level vacuum sealing for packaging of silicon photonic MEMS", Proc. SPIE 11691, Silicon Photonics XVI, 116910E (5 March 2021); https://doi.org/10.1117/12.2582975
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