Kevin K. Ryu,1 Brian F. Aull,1 Michael Collins,1 Noah Pestana,1 Joseph Ciampi,1 Rabindra Das,1 Kevan Donlon,1 Hermanus Pretorius,1 Meera Punjiya,1 Alex McIntosh,1 Erik K Duerr1
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Arrays of Geiger-mode avalanche photodiodes (GmAPDs) are fabricated on a new type of engineered substrates with an epitaxial layer grown on silicon-on-insulator (SOI) wafers. The SOI-based structure facilitates rapid die-level bump bonding of the GmAPD array to a CMOS readout integrated circuit (ROIC) followed by substrate removal to make a backilluminated image sensor. To fabricate the engineered substrate, a commercial substrate with a 70-nm-thick SOI layer is implanted with BF2 ions to create a p+-doped passivation layer on the light illumination surface. Subsequently, a lightly p-doped silicon layer on which the GmAPD will be fabricated is grown using a homoepitaxy process. This approach allows for the use of chip-level hybridization to CMOS, avoiding the high cost and demanding wafer flatness and smoothness requirements of wafer-scale 3D integration processes. The new process yields cleaner wafers and allows for tighter control of detector layer thickness compared to the previous process. GmAPDs fabricated on 5-μm-thick epitaxial silicon have over 70% photon detection efficiency (PDE) when 532 nm light is focused into the center 3 μm of the device with an oxide layer that remains after substrate removal. With an anti-reflective coating, the PDE can be improved.
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Kevin K. Ryu, Brian F. Aull, Michael Collins, Noah Pestana, Joseph Ciampi, Rabindra Das, Kevan Donlon, Hermanus Pretorius, Meera Punjiya, Alex McIntosh, Erik K Duerr, "Geiger-mode avalanche photodiode arrays fabricated on SOI engineered-substrates," Proc. SPIE 12089, Advanced Photon Counting Techniques XVI, 120890C (30 May 2022); https://doi.org/10.1117/12.2618610