Research on comparator design techniques

Wenzhuo Wu; Yawen Zhang

doi:10.1117/12.2639407

19 October 2022 Research on comparator design techniques

Wenzhuo Wu, Yawen Zhang

Proceedings Volume 12294, 7th International Symposium on Advances in Electrical, Electronics, and Computer Engineering; 122941J (2022) https://doi.org/10.1117/12.2639407
Event: 7th International Symposium on Advances in Electrical, Electronics and Computer Engineering (ISAEECE 2022), 2022, Xishuangbanna, China

Abstract

This paper describes the development of the comparator in recent years. Some improvements were proposed based on conventional architecture, including the latch-type comparator with a dynamic bias pre-amplifier and the dynamic comparator based on a floating inversion amplifier (FIA). Some innovative architectures were presented to enhance the comparator performance, including the edge-pursuit comparator (EPC) and the edge race comparator (ERC). The techniques and achievements are summarized to facilitate the future development of the comparator.

Citation Download Citation

Wenzhuo Wu and Yawen Zhang "Research on comparator design techniques", Proc. SPIE 12294, 7th International Symposium on Advances in Electrical, Electronics, and Computer Engineering, 122941J (19 October 2022); https://doi.org/10.1117/12.2639407

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