Computational lithography is a critical research area for the continued scaling of semiconductor manufacturing process technology by enhancing silicon printability via numerical computing methods.
Detailed topics include lithography modeling, resolution enhancements, optical proximity correction (OPC), and source mask optimization (SMO).
In this work, we focus on 1) lithography modeling, which computes the post-lithograph shape on the silicon wafer given a mask design;
and 2) mask optimization (inverse lithography), which optimizes a mask design such that the remaining pattern on the silicon wafer after the lithography process is as close as possible to the desired shape (\Cref{fig:intro}).
Today’s solutions for these problems are primarily CPU-based and require many thousands of CPUs running for days to compute the masks required for a modern chip. We seek AI/GPU-assisted solutions for these two problems, aiming at improving both runtime and quality.
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