Presentation + Paper
28 September 2023 Enabling efficient machine learning with device-to-algorithm co-design of spintronic hardware: opportunities and challenge
Cheng Wang
Author Affiliations +
Abstract
Advances in machine learning and artificial intelligence on various cognitive tasks, including computer vision and natural language processing, have been accompanied by a surge in hardware development to meet the high computational requirements. However, machine intelligence processed in conventional von-Neumann architectures are still orders of magnitude more inefficient than the biological brain. Moreover, building energy-efficient ML hardware accelerators for edge applications faces further challenges, due to constraints of power budget and on-chip memory. Hence, fundamentally new approaches are needed to sustain a continuous growth in the performance of computers beyond the end of CMOS technology roadmap. In order to achieve a better match between the hardware primitives and computational models, exploring new paradigms of computing necessitates a multi-disciplinary endeavor across the stack consisting of devices, circuits, hardware architectures, and learning algorithms. Specifically, such holistic endeavors will involve exploration of novel learning algorithms inspired by bio-plausible principles, design of hardware architectures best suited for data-intensive machine learning models, together with the creation and integration of novel device technologies (such as spintronic devices) that can efficiently mimic neuronal/synaptic operations in biological brains. In this talk, I will discuss our recent exploration of exploiting spintronic devices for emerging computing paradigms such as analog in-memory computing, systolic array, and neuromorphic computing in pursuit of robust and efficient ML hardware. I will first present sparsity-aware device circuit co-design of spin-orbit-torque MRAM for robust crossbar-based ML inference engine. Significant energy improvement with near-software accuracy is demonstrated leveraging robust crossbar arrays with low precision analog-to-digital conversion. We further investigate technology selection among various emerging non-volatile memory under realistic area budgets, and identified the scenarios where spin-orbit-torque MRAM may have advantages in the hardware performance compared to non-volatile memory. Moreover, towards the development of bio-plausible neuromorphic hardware I will introduce a multi-granular spintronic device that can mimic a leaky integrate-and-fire spiking neuron with compact footprints and high energy efficiency. Incorporation of such neuronal devices into the training of a deep convolution spiking neural network for image classification demonstrates improved robustness against various types of noise injection. We conclude with a brief discussion on potential opportunities and directions for future work.
Conference Presentation
(2023) Published by SPIE. Downloading of the abstract is permitted for personal use only.
Cheng Wang "Enabling efficient machine learning with device-to-algorithm co-design of spintronic hardware: opportunities and challenge", Proc. SPIE 12656, Spintronics XVI, 126560A (28 September 2023); https://doi.org/10.1117/12.2677239
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KEYWORDS
Neurons

Spintronics

Computer hardware

Design and modelling

Computer architecture

Machine learning

Magnetism

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