Room temperature and cryogenic performance of self-aligned AlInAs-GaInAs HEMTs with 0.15-um gate length

Umesh K. Mishra; April S. Brown; Linda M. Jelloian; M. Thompson; Steven E. Rosenbaum; Loi D. Nguyen; Paul M. Solomon; Richard A. Kiehl; Y. H. Kwark

doi:10.1117/12.20904

1 August 1990 Room temperature and cryogenic performance of self-aligned AlInAs-GaInAs HEMTs with 0.15-um gate length

Umesh K. Mishra, April S. Brown, Linda M. Jelloian, M. Thompson, Steven E. Rosenbaum, Loi D. Nguyen, Paul M. Solomon, Richard A. Kiehl, Y. H. Kwark

Author Affiliations +

Proceedings Volume 1288, High-Speed Electronics and Device Scaling; (1990) https://doi.org/10.1117/12.20904
Event: Advances in Semiconductors and Superconductors: Physics Toward Devices Applications, 1990, San Diego, CA, United States

Abstract

A novel self-aligned technique for 0.15 ?m gate length AlInAs-GalnAs HEMTs has been demonstrated. Devices with an oxide sidewall yielded an fT of 177 GHz whereas devices with no sidewall exhibited an fT greater than 250 GHz. The difference has been related to process damage during plasma deposition of SiO2. An extrinsic fT of 292 GHz was measured at 77K.

Citation Download Citation

Umesh K. Mishra, April S. Brown, Linda M. Jelloian, M. Thompson, Steven E. Rosenbaum, Loi D. Nguyen, Paul M. Solomon, Richard A. Kiehl, and Y. H. Kwark "Room temperature and cryogenic performance of self-aligned AlInAs-GaInAs HEMTs with 0.15-um gate length", Proc. SPIE 1288, High-Speed Electronics and Device Scaling, (1 August 1990); https://doi.org/10.1117/12.20904

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