The design improvement for hardware configuration method during FPGA loading

Linyu Tian; Dongliang Yang; Keying Huang; Jun Zhao

doi:10.1117/12.3026461

1 April 2024 The design improvement for hardware configuration method during FPGA loading

Linyu Tian, Dongliang Yang, Keying Huang, Jun Zhao

Author Affiliations +

Proceedings Volume 13082, Fourth International Conference on Mechanical Engineering, Intelligent Manufacturing, and Automation Technology (MEMAT 2023); 1308218 (2024) https://doi.org/10.1117/12.3026461
Event: 2023 4th International Conference on Mechanical Engineering, Intelligent Manufacturing and Automation Technology (MEMAT 2023), 2023, Guilin, China

Abstract

Ensuring the safety state of a product is a crucial consideration during system design, especially during transient periods such as power-up when the logic loading process occurs. Poor design in such cases can often lead to false outputs from the product, causing unintended operation of external loads and posing risks. To guarantee that the product meets the safety requirements during power-up transients, this article proposes an improved hardware configuration design during FPGA loading. The effectiveness of the improved design is verified through implementation and validation, and several key points to be noted in subsequent designs are summarized.

(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.

Citation Download Citation

Linyu Tian, Dongliang Yang, Keying Huang, and Jun Zhao "The design improvement for hardware configuration method during FPGA loading", Proc. SPIE 13082, Fourth International Conference on Mechanical Engineering, Intelligent Manufacturing, and Automation Technology (MEMAT 2023), 1308218 (1 April 2024); https://doi.org/10.1117/12.3026461

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