Redundant finite rings for fault-tolerant signal processors

Graham A. Jullien; S. S. Bizzan; Neil M. Wigley; W. C. Miller

doi:10.1117/12.190888

28 October 1994 Redundant finite rings for fault-tolerant signal processors

Graham A. Jullien, S. S. Bizzan, Neil M. Wigley, W. C. Miller

Proceedings Volume 2296, Advanced Signal Processing: Algorithms, Architectures, and Implementations V; (1994) https://doi.org/10.1117/12.190888
Event: SPIE's 1994 International Symposium on Optics, Imaging, and Instrumentation, 1994, San Diego, CA, United States

Abstract

Redundant Residue Number Systems (RRNS) have been proposed as suitable candidates for fault tolerance in compute intensive applications. The redundancy is based on multiple projections to moduli sub-sets and conducting a search for results that lie in a so-called illegitimate range. This paper presents RRNS fault tolerant procedures for a recently introduced finite polynomial ring mapping procedure (modulus replication RNS). The mapping technique dispenses with the need for many relatively prime ring moduli, which is a major draw-back with conventional RRNS systems. Although double, triple, and quadrupole modular redundancy can be implemented in the polynomial mapping structure, polynomial coefficient circuitry, or the independent direct product ring computational channels, for error detection and/or correction, this paper discusses the implementation of redundant rings which are generated by (1) redundant residues, (2) spare general computational channels, or (3) a combination of the two. The first architecture is suitable for RNS embedding in the MRRNS, and the second for single moduli mappings. The combination architecture allows a trade-off between the two extremes. The application area is in fault tolerant compute intensive DSP arrays.

Citation Download Citation

Graham A. Jullien, S. S. Bizzan, Neil M. Wigley, and W. C. Miller "Redundant finite rings for fault-tolerant signal processors", Proc. SPIE 2296, Advanced Signal Processing: Algorithms, Architectures, and Implementations V, (28 October 1994); https://doi.org/10.1117/12.190888

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