Resource pools: an abstraction for configurable computing codesign

James B. Peterson; Peter M. Athanas

doi:10.1117/12.255819

21 October 1996 Resource pools: an abstraction for configurable computing codesign

James B. Peterson, Peter M. Athanas

Proceedings Volume 2914, High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic; (1996) https://doi.org/10.1117/12.255819
Event: Photonics East '96, 1996, Boston, MA, United States

Abstract

The utility of configurable computing platforms has been demonstrated and documented for a wide variety of applications. Retargeting an application to custom computing machines (CCMs) has been shown to accelerate execution speeds with respect to execution on a sequential, general- purpose processor. Unfortunately, these platforms have proven to be rather difficult to program when compared to contemporary general-purpose platforms. Retargeting applications is non-trivial, due to the lack of design tools which work at a high level and consider all available computational units in the target architecture. To make configurable computing accessible to a wide user base, high- level entry tools -- preferably targeted toward familiar programming environments -- are needed. Also, in order to target a wide variety of custom computing machines, such tools cannot depend on a particular, fixed, architectural configuration. This paper introduces resource pools as an abstraction of general computing devices which provides a homogeneous description of FPGAs, ASICs, CPUs, or even an entire network of workstations. Also presented is an architecture-independent design tool which accepts a target architecture's description as a collection of resource pools, and partitions a program written in a high-level language onto that architecture, effectively synthesizing a hardware description for the FPGA portions of A CCM, and a software description for any attached CPUs.

Citation Download Citation

James B. Peterson and Peter M. Athanas "Resource pools: an abstraction for configurable computing codesign", Proc. SPIE 2914, High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic, (21 October 1996); https://doi.org/10.1117/12.255819

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