Analyzing the tolerance and controls on critical dimensions and overlays as prescribed by the National Technology Roadmap for Semiconductors

Syed A. Rizvi

doi:10.1117/12.280543

14 August 1997 Analyzing the tolerance and controls on critical dimensions and overlays as prescribed by the National Technology Roadmap for Semiconductors

Syed A. Rizvi

Author Affiliations +

Proceedings Volume 3183, Microlithographic Techniques in IC Fabrication; (1997) https://doi.org/10.1117/12.280543
Event: ISMA '97 International Symposium on Microelectronics and Assembly, 1997, Singapore, Singapore

Abstract

Continued demands on shrinking features with tighter tolerance on Critical Dimensions (CDs) and overlays are placing stringent requirements on parameters that are essentially the building blocks of the metrologies for CDs and overlays. This paper conducts a reality check on the precision and error budgets assigned to CD and overlay controls by the National Technology Roadmap for Semiconductors in light of constraints on parameters that are fundamental to the above measurements.

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Syed A. Rizvi "Analyzing the tolerance and controls on critical dimensions and overlays as prescribed by the National Technology Roadmap for Semiconductors", Proc. SPIE 3183, Microlithographic Techniques in IC Fabrication, (14 August 1997); https://doi.org/10.1117/12.280543

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