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18 August 1997 Optimizing thermal performance-cost trade-off
Sambu Dakuginow, Roland Apides, Efren Lacap, Mark J. Berg
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Proceedings Volume 3184, Microelectronic Packaging and Laser Processing; (1997) https://doi.org/10.1117/12.280582
Event: ISMA '97 International Symposium on Microelectronics and Assembly, 1997, Singapore, Singapore
Abstract
Effective power dissipation in VLSI packaging has become a performance limiting criterion in small form factor, high performance hard disk drive applications. While potential solutions may exist, many come with unacceptable associated costs. Silicon systems and seagate technology is developed a program to identify suitable packaging solutions for the associated cost/performance tradeoff. For devices with power dissipation of 1W or less, the standard TQFP was the optimum choice. For power dissipation between 1W and 1.7W, a standard TQFP with leadfingers extending to the diepaddle is sufficient. For advanced generation devices running very near 2W, there are two possible solutions: a deep downset TQFP and a CBGA with thermal vias.
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Sambu Dakuginow, Roland Apides, Efren Lacap, and Mark J. Berg "Optimizing thermal performance-cost trade-off", Proc. SPIE 3184, Microelectronic Packaging and Laser Processing, (18 August 1997); https://doi.org/10.1117/12.280582
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KEYWORDS
Packaging
Standards development
Silicon
Very large scale integration
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