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25 August 2000 Elimination of wafer edge die yield loss for accelerometers
Zhenjun Zhang, Kim A. Eskes
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Proceedings Volume 4174, Micromachining and Microfabrication Process Technology VI; (2000) https://doi.org/10.1117/12.396468
Event: Micromachining and Microfabrication, 2000, Santa Clara, CA, United States
Abstract
Residual stresses from deposition of several micron thick polysilicon film on accelerometer wafers caused wafer to warp towards edge of wafer. The average peak to valley difference for wafer flat across wafer is 16 +/- 1 micrometers . The photo layer following the thick polysilicon deposition process is a CD critical layer with 1 micrometers spacing to be resolved. With standard stepper configuration, wafer non- flatness from residual stresses reduced overall depth of focus and made the 1 (mu) spacing in edge dies not resolved, resulting in stiction and yield loss for edge dies. To minimize the effect of wafer non-flatness on across wafer CD control and edge die CD definition at photo, three different focus algorithms as well as two different wafer chuck styles were evaluated on 1X steppers. Results showed that both oblong wafer chuck and two step focus option significantly improved CD definition and resolution of the 1 micrometers spacing in edge dies. Two step focus combined with oblong chuck offered the best CD control edge dies. Edge die yield loss was eliminated for accelerometer wafers ran with oblong chuck and two step focus. Oblong chuck, and two step focus combination have been released to full production at Poly2 layer of accelerometers.
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Zhenjun Zhang and Kim A. Eskes "Elimination of wafer edge die yield loss for accelerometers", Proc. SPIE 4174, Micromachining and Microfabrication Process Technology VI, (25 August 2000); https://doi.org/10.1117/12.396468
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KEYWORDS
Semiconducting wafers
Deposition processes
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