Effect of annealing after metal etch on analog device and its impact on yield performance

Madhusudan Mukhopadhyay; Teo Yeow Meng; Lim Sieng Ye; Rajan Rajgopal

doi:10.1117/12.404866

23 October 2000 Effect of annealing after metal etch on analog device and its impact on yield performance

Madhusudan Mukhopadhyay, Teo Yeow Meng, Lim Sieng Ye, Rajan Rajgopal

Proceedings Volume 4229, Microelectronic Yield, Reliability, and Advanced Packaging; (2000) https://doi.org/10.1117/12.404866
Event: International Symposium on Microelectronics and Assembly, 2000, Singapore, Singapore

Abstract

This paper demonstrates the importance of annealing in presence of forming gas after first layer metal etch in analog devices. A drop of 3 mA analog power supply current has been observed. DC-offset value has also reduced from 40 mV-14mV. Yield performance of the device has improved dramatically. All these lead to the improvement of the device performance and demonstrate the degradation of MOSFET matching circuits and analog capacitors during metal etch.

Citation Download Citation

Madhusudan Mukhopadhyay, Teo Yeow Meng, Lim Sieng Ye, and Rajan Rajgopal "Effect of annealing after metal etch on analog device and its impact on yield performance", Proc. SPIE 4229, Microelectronic Yield, Reliability, and Advanced Packaging, (23 October 2000); https://doi.org/10.1117/12.404866

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