New methods for fabricating step and flash imprint lithography templates

Douglas J. Resnick; Todd C. Bailey; David P. Mancini; Kevin J. Nordquist; William J. Dauksher; Eric S. Ainley; A. Talin; Kathleen A. Gehoski; Jeff H. Baker; Byung Jin Choi; Stephen C. Johnson; Matthew Colburn; Mario J. Meissl; S. V. Sreenivasan; John G. Ekerdt; C. Grant Willson

doi:10.1117/12.437269

24 July 2002 New methods for fabricating step and flash imprint lithography templates

Douglas J. Resnick, Todd C. Bailey, David P. Mancini, Kevin J. Nordquist, William J. Dauksher, Eric S. Ainley, A. Talin, Kathleen A. Gehoski, Jeff H. Baker, Byung Jin Choi, Stephen C. Johnson, Matthew Colburn, Mario J. Meissl, S. V. Sreenivasan, John G. Ekerdt, C. Grant Willson

Author Affiliations +

Proceedings Volume 4608, Nanostructure Science, Metrology, and Technology; (2002) https://doi.org/10.1117/12.437269
Event: Workshop on Nanostructure Science, Metrology, and Technology, 2001, Gaithersburg, MD, United States

Abstract

Step and Flash Imprint Lithography (SFIL) is an attractive method for printing sub-100 nm geometries. Relative to other imprinting processes SFIL has the advantage that the template is transparent, thereby facilitating conventional overlay techniques. The purpose of this work is to investigate alternative methods for defining features on an SFIL template. The first method used a much thinner (< 20 nm) layer of Cr as a hard mask. Thinner layers still suppress charging during e-beam exposure of the template, and have the advantage that CD losses encountered during the pattern transfer of the Cr are minimized. The second fabrication scheme addresses some of the weaknesses associated with a solid glass substrate. Because there is no conductive layer on the final template, SEM and defect inspection are compromised. By incorporating a conductive and transparent layer of indium tin oxide on the glass substrate, charging is suppressed during inspection, and the UV characteristics of the final template are not affected. Templates have been fabricated using the two methods described above. Features as small as 30 nm have been resolved on the templates. Sub-80 nm features were resolved on the first test wafer printed.

Citation Download Citation

Douglas J. Resnick, Todd C. Bailey, David P. Mancini, Kevin J. Nordquist, William J. Dauksher, Eric S. Ainley, A. Talin, Kathleen A. Gehoski, Jeff H. Baker, Byung Jin Choi, Stephen C. Johnson, Matthew Colburn, Mario J. Meissl, S. V. Sreenivasan, John G. Ekerdt, and C. Grant Willson "New methods for fabricating step and flash imprint lithography templates", Proc. SPIE 4608, Nanostructure Science, Metrology, and Technology, (24 July 2002); https://doi.org/10.1117/12.437269

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available