Paper
26 June 2003 Desirable wafer edge flatness for CD control in photolithography
Tadahito Fujisawa, Soichi Inoue, Tsuneyuki Hagiwara, Kodama Kennichi, Makoto Kobayashi, Katsuya Okumura
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Abstract
Desirable wafer edge flatness was investigated to obtain optimum free-standing wafer edge shape for photolithography. In order to obtain the criteria of free-standing edge shape, we clarified the desirable post-chuck flatness at edge sites in advance. We investigated a desirable free-standing wafer edge, taking into consideration both the wafer and wafer holder shape. Firstly, to obtain a desirable post-chuck wafer edge shape, the vicinity of wafer edge after chucking was modeled, and SFQR was simulated. Secondly, a shape in the vicinity of free-standing edge shape was modeled, and the edge flatness after chucking was simulated. And finally, the simulated flatness was compared with the desirable post-chucked wafer edge shape, and we could obtain desirable free-standing wafer edge shape. Individual measurement of the free-standing back-side and front-side surfaces as well as the thickness of the edge position was found to be necessary for accurate estimation of the post-chuck edge shape.
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Tadahito Fujisawa, Soichi Inoue, Tsuneyuki Hagiwara, Kodama Kennichi, Makoto Kobayashi, and Katsuya Okumura "Desirable wafer edge flatness for CD control in photolithography", Proc. SPIE 5040, Optical Microlithography XVI, (26 June 2003); https://doi.org/10.1117/12.485522
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KEYWORDS
Semiconducting wafers

Optical lithography

Tolerancing

Scanners

Critical dimension metrology

Error analysis

Finite element methods

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