Rapid acquisition adaptive zero-crossing DPLL

Saleh R. Al-Araji; Mahmoud A. Al-Qutayri; Mohammed Al-Qayed

doi:10.1117/12.582285

28 February 2005 Rapid acquisition adaptive zero-crossing DPLL

Saleh R. Al-Araji, Mahmoud A. Al-Qutayri, Mohammed Al-Qayed

Proceedings Volume 5649, Smart Structures, Devices, and Systems II; (2005) https://doi.org/10.1117/12.582285
Event: Smart Materials, Nano-, and Micro-Smart Systems, 2004, Sydney, Australia

Abstract

In the proposed work, an adaptive first order zero-crossing digital phase locked loop (AZC-DPLL) for rapid acquisition, reliable locking, and independent of input signal level is designed, simulated and subsequently implemented on an FPGA based reconfigurable system. The finite state machine controller of the AZC-DPLL senses any changes in input signal frequency and amplitude level, that may cause the loop to loose lock, and accordingly adjusts the loop gain to bring the loop in lock within a few samples. Through this adaptation process, the conflicting requirement of fast acquisition and reliable locking is achieved.

Citation Download Citation

Saleh R. Al-Araji, Mahmoud A. Al-Qutayri, and Mohammed Al-Qayed "Rapid acquisition adaptive zero-crossing DPLL", Proc. SPIE 5649, Smart Structures, Devices, and Systems II, (28 February 2005); https://doi.org/10.1117/12.582285

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