Paper
12 May 2005 A simulation performance framework using in situ metrology
Joseph J. Bendik, Yuji Yamaguchi, Lyle G. Finkner, Adlai H. Smith
Author Affiliations +
Abstract
Modern lithographic simulation engines1 are quite capable of determining the detrimental impact of source and lens aberrations on low k1 lithographic metrics - given the proper input2. Circuit designers, lithographic engineers, and manufacturing facilities would seem to be the beneficiaries of the predictive power of lithographic simulators; however, in-situ methods for accurately determining lens aberrations and source metrology maps have only rather recently been accepted3 and integrated into practice4. For this work, we introduce several new methods for characterizing scanner performance including a high accuracy source metrology tool and integrated simulation engine5. We focus attention on the combined detrimental effects of lens aberrations, source non-ideality, distortion, synchronization error, and transmission error on deep sub-wavelength lithographic metrics such as: H-V bias, feature-shift, and ΔCD. After a brief theoretical discussion, we describe a matrix of simulation case studies and present results. Finally, we discuss potential applications for the simulation performance framework and its potential impact to industry.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Joseph J. Bendik, Yuji Yamaguchi, Lyle G. Finkner, and Adlai H. Smith "A simulation performance framework using in situ metrology", Proc. SPIE 5754, Optical Microlithography XVIII, (12 May 2005); https://doi.org/10.1117/12.600135
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CITATIONS
Cited by 2 scholarly publications.
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KEYWORDS
Metrology

Distortion

Lithography

Scanners

Semiconducting wafers

Device simulation

Critical dimension metrology

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