Paper
18 August 2005 The SIDECAR ASIC: focal plane electronics on a single chip
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Abstract
Traditionally, focal plane arrays require extensive external focal plane electronics (FPE) to provide clocks and biases as well as to digitize the analog output signals. The FPE has to be well-designed and is typically large, heavy and powerhungry. Most importantly, the FPE has to be placed some distance away from the FPA, which complicates maintaining low noise performance throughout the complete system. To offer an alternative to the discrete electronics, Rockwell Scientific has developed a new approach known as the SIDECAR application-specific integrated circuit (ASIC). This single chip provides all the functionality necessary to operate an infrared array with the convenience of a pure digital interface to the outside world. This paper will present performance data on the latest generation of the SIDECAR ASIC operating the JWST H2RG detector arrays at cryogenic temperature. The test results demonstrate that an ASIC based FPA system will meet or exceed all performance requirements for the JWST mission. The SIDECAR ASIC has been selected by NASA to become the FPA drive electronics for all shortwave infrared instruments on JWST.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Markus Loose, James Beletic, John Blackwell, James Garnett, Selmer Wong, Don Hall, Shane Jacobson, Marcia Rieke, and Greg Winters "The SIDECAR ASIC: focal plane electronics on a single chip", Proc. SPIE 5904, Cryogenic Optical Systems and Instruments XI, 59040V (18 August 2005); https://doi.org/10.1117/12.619638
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Cited by 21 scholarly publications.
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KEYWORDS
Analog electronics

James Webb Space Telescope

Sensors

Electronics

Staring arrays

Cryogenics

Clocks

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