DFM requirements and solution roadmaps: the multilayer approach

Juan Antonio Carballo; Sani Nassif

doi:10.1117/12.659302

13 March 2006 DFM requirements and solution roadmaps: the multilayer approach

Juan Antonio Carballo, Sani Nassif

Proceedings Volume 6156, Design and Process Integration for Microelectronic Manufacturing IV; 61560Y (2006) https://doi.org/10.1117/12.659302
Event: SPIE 31st International Symposium on Advanced Lithography, 2006, San Jose, California, United States

Abstract

Design For Manufacturability (DFM) has emerged as a major driver as the semiconductor industry continues on its historic scaling trend. The International Technology Roadmap for Semiconductors (ITRS) Design Group has engaged in a major overhaul of the Design Technology Roadmap, including a completely new section focused on DFM. As part of that overhaul, it was observed that quantifying and road-mapping DFM requires effective yet simple models that can relate broad technology characteristics to specific circuit performances such as delay and power. In this article, we discuss the general topic of DFM roadmaps, and show a simple performance model built upon a canonical circuit and analytical solution that is parameterized such that it can address the DFM roadmap problem. We also show that for important model parameters such as threshold voltage, it may be necessary to apportion the various spaces of variability.

Citation Download Citation

Juan Antonio Carballo and Sani Nassif "DFM requirements and solution roadmaps: the multilayer approach", Proc. SPIE 6156, Design and Process Integration for Microelectronic Manufacturing IV, 61560Y (13 March 2006); https://doi.org/10.1117/12.659302

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