Paper
21 September 2007 ISA extensions for high-radix online floating-point addition
Author Affiliations +
Abstract
ISA extensions for DLX type architectures are proposed to perform high radix online floating point addition on fixed point units with extended feature sets. Online arithmetic allows most significant digit first computation of results, allowing overlapped execution of dependent operations and offers greater instruction scheduling opportunities than software implementations of conventional floating point addition. In this paper we seek an ISA formulation to find a middle ground between full hardware floating point addition units and software implementations strictly based on available ALU logic.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Pouya Dormiani, Miloš D. Ercegovac, and O. Colavin "ISA extensions for high-radix online floating-point addition", Proc. SPIE 6697, Advanced Signal Processing Algorithms, Architectures, and Implementations XVII, 66970T (21 September 2007); https://doi.org/10.1117/12.734916
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KEYWORDS
Logic

Quantization

Algorithm development

Computer programming

Alignment procedures

Clocks

Computer simulations

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