Paper
19 May 2008 Image placement error of photomask due to pattern loading effect: analysis and correction technique for sub-45 nm node
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Abstract
As semiconductor features shrink in size and pitch, the image placement error at photomask has been interested as an important factor to be reduced. Especially, by the development of double exposure technique (DET) or double patterning technique (DPT) for sub-45 nm node the image placement error is required to be controlled tightly. Following ITRS roadmap, when DET or DPT is used the registration for sub-45 nm node is required to be less than 4 nm but this specification still corresponds to the challengeable goal. Among various sources of image placement errors, here, we focus on the error occurring at patterning process of photomask and discuss its effect on the photomask overlay. We name the image placement error occurred at patterning process due to e-beam charging effect, absorber etching effect, and so on as the pattern loading effect. We quantify the amount of pattern loading effect on registration error, analyze it with the help of simulation and experiment, and discuss the character of each error and correction method.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jin Choi, Sang Hee Lee, Dongseok Nam, Byung Gook Kim, Sang-Gyun Woo, and Han Ku Cho "Image placement error of photomask due to pattern loading effect: analysis and correction technique for sub-45 nm node", Proc. SPIE 7028, Photomask and Next-Generation Lithography Mask Technology XV, 70281X (19 May 2008); https://doi.org/10.1117/12.793074
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CITATIONS
Cited by 4 scholarly publications and 1 patent.
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KEYWORDS
Photomasks

Etching

Image processing

Error analysis

Image registration

Electrons

Electron beam lithography

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