Paper
17 October 2008 Considering MEEF in inverse lithography technology (ILT) and source mask optimization (SMO)
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Abstract
Mask Error Enhancement Factor (MEEF) plays an increasingly important role in the DFM and RET flow required to continue shrinking designs in the low-k1 lithography regime. The ability to model and minimize MEEF during lithography optimization and RET application is essential to obtain a usable process window (PW). In Inverse Lithography Technology (ILT), MEEF can be included in the cost function as a nonlinear factor, so that the inversion minimizes MEEF, in addition to optimizing PW and edge placement error (EPE). ILT has been shown to optimize masks for a given source. Using ILT for contemporaneous Source and Mask co-Optimization (SMO) can provide further benefit by balancing the complexity of mask and source. Results demonstrating the benefits of "MEEF-aware" ILT and SMO for advanced technology nodes are presented in this paper.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Linyong Pang, Guangming Xiao, Vikram Tolani, Peter Hu, Thomas Cecil, Thuc Dam, Ki-Ho Baik, and Bob Gleason "Considering MEEF in inverse lithography technology (ILT) and source mask optimization (SMO)", Proc. SPIE 7122, Photomask Technology 2008, 71221W (17 October 2008); https://doi.org/10.1117/12.803801
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CITATIONS
Cited by 26 scholarly publications and 22 patents.
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KEYWORDS
Photomasks

Source mask optimization

Lithography

SRAF

Logic

Semiconducting wafers

Photovoltaics

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